I want to use the DCAN interface on PRU-ICSS to send/receive data present on DDR RAM at a fixed physical address.
- Address of DDR is 0x8000_0000 to 0x9000_0000(256MiB)
- My buffer is present at 0x8FF0_0000 to 0x9000_0000 (1MiB)
As soon as I access the hardware address 0x8FF0_0000 the PRU-ICSS goes into some faulty state and becomes unresponsive.
Is there some other way to access DDR from PRU-ICSS ?
What about sending the faulty code? Did you enable the OCP master port?
I didn’t check all your code (…/sage_pru.hp is missing, so I don’t know how MEM_PRU_DATA0_BASE is defined).
But: From the PRU-0 point of view, the address of DRam-0 is 0x0 (and DRam-1 is 0x2000).
Really appreciate your help. I was able to run the example successfully.
The linux side code for memory allocation was the same as suggested by you. Same was suggested on the post
I’m trying to achieve the same through C/C++ toolchain for PRU-ICSS. There seems to be some issue in the way we access control registers in C.
There seems some way through linker script. Can you or anybody else give me some pointers on how to access control registers in C Code.
Sorry - when we did all the PRU work the c/c++ PRUSS compiler was not available yet, so I haven’t looked at it yet. Our code was pretty timing sensitive so using pru assembly was probably the right way to go anyway.
I was successfuly able to access the ddr from C code through a little workaround though. I kept the OCP initialisation in inline assembly and rest of the code in C.
It works like a charm
Really for your help. Your example helped me solve the access issue.
Do you have any idea regarding using PRU to access the flash ??