ADC frequency sample calculus using PRU and C code on BBB

Hi friends. Im trying to use the BBB built-in ADC to read values with regular sampling frequency. I am using almost all defined by Rafael Vega’s github project page ( I already made changes to read the ADC sampled values on the ARM program and everithing are working fine. BUT i have 2 questions about this program:

  1. I want to know how he knows the necessaries BBB registers to configurate the ADC and the communication pipe between ADC and PRUs on this setup? I already looked the PRUSS and SITARA doccumentation but with no match the registers names used by him.

  2. how i can calculate the sampling frequency? I found on his page that it was configured to 50 ksps but, trying to calculate this sampling frequency on the gived formula:

// fs = 24MHz / (CLK_DIV2Channels*(OpenDly+Average*(14+SampleDly))) (on line 108 from the link above)

I didn’t get an integer fs value, for example, using their specified values (clock_divider = 4; open_delay = 4; average = 1; sample_delay = 4; and channel = 6) i get 22727.2727273 Hz… Am i missing something?

Thanks for all…

Why don’t you use the IIO ADC driver which can sample as 800Ksps? The sampling frequency is calculated as follows:

In the file BB-ADC-0A00.dts, you must configure the following settings:

ti,chan-step-avg = <1 1 1 1 1 1 1 1> /* 2 sample average */
ti,chan-step-opendelay = <0 0 0 0 0 0 0 0>
ti,chan-step-sampledelay = <0 0 0 0 0 0 0 0>

To achieve a conversion rate of 800 KS/s

From include/linux/mfd/ti_am335x_tscad.c


  • time in us for processing a single channel, calculated as follows: