BBB, GPMC bus for FPGA FIFO and 3.8 linux kernel

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1

Dear all,
I posted a similar post in the TI E2E forum and they said to post it here, so…

I have to set the AM3x side to manage the reading phase from a FIFO placed inside an FPGA and I almost lost. I saw several posts which starts as: “I have to use GPMC bus and I do not know how to do it.”, and several posts asking too detailed informations. So, I’ll try to be in the midway.

I usually write firmware (vhdl), so I am not that expert in software, kernel and driver (frankly speaking, I am not an expert at all). I spent the last two days reading manuals, guides, codes around and what I have understood so far can be summarized in a few steps (by supposing to work with the 3.8 linux kernel):

  1. create a .dts file (whit chip-select, output-enable, write enable… settings)

  2. compile and install it in /lib/firmware

  3. enable it ( in the slot field)

  4. Now that you have sort of drivers for GPMC communication, it is possible to write C code to work with it.

I saw here http://derekmolloy.ie/beaglebone/ doing something similar for GPIO, so, I guess it could be possible to do that also for GPMC.

Something is missing? is that right?

And then, is there a .dts template for gpmc that one can just modify to set communication? Is there also some already-tested file for C coding or I should write it from scratch?

Thanks a lot for your help.

Alberto

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Hi Alberto

Could you succeed to access GPMC as you posted in your 22/10/13 post?

I am involved in similar project, that must access a FPGA that have a video FIFO connected to a video digitalizer and we need to transfer a video frame into BBB, using its GPMC.

Could you give some directions on how to access the GPMC in a BBB board?

Thanks

Sergio Kamakura
Warp Tecnologia