[beagleboard] configuring mux pins to support spigoogle groups

omap_ctrl_writew() should be good enough.

the register can be though of as two halfs : top 16bit half and bottom
16bit half.
So supply the address as: base + 0x00 or base + 0x02 to
omap_ctrl_writew() and it should do the write.
From TRM and data manual make sure you are writing to the right register.

Also there used to be a userspace /sys/.../omap_mux/... api that can
do the mux as well from userspace.

Thank you, Randy Rodes, This worked…

The problem was in providing the Offset Address, I got confused with the Offset value given in the TRM and gave the same offset for the upper half(16bit) register.
However, one thing i still don’t get it is, when i use 32bit write API with the Offset for CONTROL_PADCONF_MCBSP1_DX[15:0] → SPI4_SIMO (0x190) , there is alignment exception, whereas when i use the 16bit write API, It works fine. How is that possible? could you brief up on that.

glad i could provide some working suggestion.
I have no idea on the alignment exception. there should be AMxxx
processor experts who can comment.