[beagleboard] SPI Clock Rate


My question is:
Can I connect a SPI master that provides a SPI clock of exactly 5 MHz to
the SPI lines?

NO. Any clock rate must be divisible into 48Mhz. A 2 divisor produces
24MHz. 3 produces 16. 4 produces 12. 5 produces 9.6. 6 produces 4
Mhz, etc.

Even those frequencies are unstable. I tried to connect an A/D directly
to an SPI port, a chip whose sample rate is the clock rate. The results
produced were useless for performing a subsequent FFT, even when
counting a 100kHz ovenized crystal oscillator.

The first problem is that the clock generation routine is pre-emptable
and that is truly random. So I paid to have a driver written that
basically locks the kernel during the sample process. The results are
still unusable.

I haven't investigated further but I'm pointing the finger at the
inexpensive crystal oscillator that supplies the chip. Have lots of
close in phase noise to begin with and then multiply the clock many
times in the various PLLs inside the processor and what I observed is
what you get.

My next solution was going to be to put an FPGA in the path, one
controlled by an TCXO. Let the FPGA read the A/D and buffer the data
then deliver it to the processor as the processor could take it.

In the end, I stood back, realized how complicated and expensive this
design was becoming and decided to abandon the FFT approach to tuning
this new induction heater product. In fact, I abandoned the BB completely.

If you go ahead with your plans, the FPGA is the approach I suggest.
Find a good radio-quality TCXO of say 25Mhz, divide it by 5 in the FPGA
and let that precision 5 Mhz drive your A/D converter.


Hello John,

thank you for the extensive information.

I'm not sure, if you were trying to use the the BB as SPI slave. With the
clock coming from the external Master.
As I understand it, you are talking about the Oszillator on in the BB
generating the clock, or?

Yes, the BB was the master driving a simple A/D converter.

My setup is like this. The BB is supposed to run as an EtherCAT Master. The
BB will be controlled by a FPGA based Automation Controller. I am looking
for a way to transfer data with a high data rate (min 5 Mbit) from the BB
to the automation controller. The automation controller can do digital
lines with a multiple of 100 ns. So clock can be max of 5 Mhz. I wanted to
use these for SPI.

With "No OS" I meant using Starterware. Sorry, I am pretty new to this

Without the overhead of Linux, that should be easy. There's another
very nice fellow on the list who has helped me a bit. He had achieved a
continuous flow of over 1Mbps using one of the two aux processor (PRR?)
in the chip. Again, though, he was running with the BB as master.
Maybe he'll speak up.