I can ensure you that by using module, at least 10MHz were achieved by me.
The MANNUAL says Bank0 can works under 100MHz with proper configuration of clk, but only bank0.
if you set the registers and get this real, inform me please.
Looking forward your seccess.
Here is a GPIO module and accompanying userspace test program I wrote for Linux running on a Nios2 core (soft core for Altera).
The Makefile will build both. (test = builds userspace program, module builds module, all builds both)
fwti_gpio_test.c is the userspace program source.
fwti_gpio.c is the module source.
There isn’t much platform-specific in there. Where you see NIOS2 for the architecture and calls to the nios2 gcc tools, you will need to switch it to use the ARM stuff.
I am in the process of converting this to Beagle. If you beat me to it, please send me your results!