name: uart1_txd.(null) (0x44e10984/0x984 = 0x0037), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE7
signals: uart1_txd | mmc2_sdwp | d_can1_rx | NA | NA | NA | NA | NA
The mux is in mode 7 (NA) instead of mode 0 (uart1_txd) by default.
Although I haven't tried using UARTs other than UART1, I can tell you
where there mux settings are.
The /sys/kernel/debug/omapmux filenames are taken from the Mode 0
usages of the pins, regardless of which mode the pin mux is currently
in.
You can get the mode 0 names from Tables 10 and 12 of the Beaglebone
System Reference Manual.
For example, uart2_rxd is in Table 12 of the SRM (port 9 pin 22), and
the mode 0 usage for that pin is spi0_sclk. So, the mux setting uses
the following file:
root@beaglebone:/sys/kernel/debug/omap_mux# cat spi0_sclk
name: spi0_sclk.(null) (0x44e10950/0x950 = 0x0037), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE7
signals: spi0_sclk | NA | NA | NA | NA | NA | NA | NA
In this case, it is currently in mode 7. Since uart2_rxd is mode 1,
you would change the mode (and keep the receive bit enabled, but set
the pullup to pulldown) with:
root@beaglebone:/sys/kernel/debug/omap_mux# echo 21 > spi0_sclk
root@beaglebone:/sys/kernel/debug/omap_mux# cat spi0_sclk
name: spi0_sclk.(null) (0x44e10950/0x950 = 0x0021), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: spi0_sclk | NA | NA | NA | NA | NA | NA | NA
As I said, I haven't actually tried using UART2, so I can't say for
sure that this mux setting works as expected.
Hi, Nikhil, Can you help me? When I set up the UART2 and try to use a code to communicate between UART1 and Uart2, the uart1_rxd stops working but uart1_txd still works. Can you explain why?
TI didn’t map all pins in the mux table properly. That’s the reason why you see uart1_txd.(null) since this pin is mapped to mux mode 7.
You can update the mux table am33xx_muxmodes[] in kernel/arch/arm/mach-omap2/mux33xx.c file. In this file, the current entry for UART1_TXD as followings: