Beta Testers - FPGA shield for Beaglebone

It looks pretty cool, and darn you beat me to it :stuck_out_tongue: I’ve been working on a similar board for a while now. It’s almost done, but I got swallowed by midterms the past 3 weeks, so haven’t finished making the corrections my manufacturer suggested just yet. They are done (for now) so going to do a hard sprint for my board.

Looking at the pins connecting it on P8, it seems like you will have all the GPMC interface covered (minus 1 pin that’s on P9, but I can’t think of what it does off the top of my head). From my own work, I think the GPMC is definitely the way to go for interfacing. I look forward to being able to swap source code for the interface in the coming months. Reading your schematics, I don’t see anyway to load the bitstream through the beaglebone. I only see that the on board mcu is by default loading it. Will the beaglebone have a connection to that mcu through a header to load bitstreams? I also like that you have pmods on your board. That is something I didn’t think to include… I figured I would make a “pmod board” later that would stack on top of my fpga board. The one thing with the beaglebone is the EEPROM to identify the cape. I don’t see you having a connection to the beaglebone’s I2C bus for that. Are you planning on adding one, or do you have a different strategy for identifying the board? (If so, mind telling? maybe it’s something I could use ;))

All in all, I think it’s a cool board. Interestingly, I now know of 3 of us all designing fpga based boards for the beaglebone. Each on is different from the others. It’s neat how all of us took different approach to the problem.

Have a good one,