I am not looking to expand the BBB’s internal RAM nor use external RAM for any operational functions, and I realize what I am asking is not trivial.
But, I want to ask before I start down a path that is going to be a nightmare. Is it practical to build an external interface to a standard DDR3 SODIMM for memory testing purposes? I won’t need to operate at full speed, either, just perform read/write cycles to verify memory integrity after certain environmental tests. For this purpose we will likely need to use a fresh tester for each DIMM we want to test (probably dozens), so the tester should be inexpensive. I was hoping that something like the BBB might be a novel way to solve this problem rather than some of the existing ($1000’s each) memory tester or FPGA eval boards.
Is the answer as simple as “The AM335 DDR controller is hardwired to the onboard RAM and cannot be reconfigured to address external RAM in any way”?