Interfacing with DDR3 SODIMM

I am not looking to expand the BBB’s internal RAM nor use external RAM for any operational functions, and I realize what I am asking is not trivial.

But, I want to ask before I start down a path that is going to be a nightmare. Is it practical to build an external interface to a standard DDR3 SODIMM for memory testing purposes? I won’t need to operate at full speed, either, just perform read/write cycles to verify memory integrity after certain environmental tests. For this purpose we will likely need to use a fresh tester for each DIMM we want to test (probably dozens), so the tester should be inexpensive. I was hoping that something like the BBB might be a novel way to solve this problem rather than some of the existing ($1000’s each) memory tester or FPGA eval boards.

Is the answer as simple as “The AM335 DDR controller is hardwired to the onboard RAM and cannot be reconfigured to address external RAM in any way”?

Our interface is 16bits wide. We use DDR3L. We have no termination resistors.Maximum memory is 2GB. There are no external pins for the DDR. You would need to redesign the schematic and PCB.

Not sure how trivial this is, but it in my mind would be a waste of time and expensive.,.


That’s essentially the response I was expecting. I have a couple uses for this board already planned, so it would have been convenient, but I think we’ll have to go with a low-cost FPGA board and drop-in a DDR3 core. Certainly a more flexible approach, if more expensive.