Interrupt from PRU to Kernel Module ISR BBB

I try to trigger an interrupt from PRU1 and catch it in an ISR
in a kernel module and it doesnt work.

I can start the kernel module and i see the interrupts are registered
in /proc/interrupts

I mapped PRU event 7 (pr1_iep_tim_cap_cmp_pend) to PRU host interrupt 1
(for timing) and it works.

I mapped PRU events 16 and 17 (pr1_pru_mst_intr[xx]_intr_req) to host
interrupt 6 and 7.
I registered ISRs with request_irq to 24 and 25.
It doesnt work.

I also tried other channel host mappings…

Is there an enable bit i miss?

-----------
km:
result = request_irq(24,
        pru_output0_irq_handler,
        IRQF_TRIGGER_RISING,
        "Stepper Segment Decoder",
        NULL);
-----------
-----------
PRU1:
	CT_INTC.SIPR0 = 0xFFFFFFFF;
	CT_INTC.SIPR1 = 0xFFFFFFFF;

	CT_INTC.SITR0 = 0;
	CT_INTC.SITR1 = 0;

	CT_INTC.CMR1_bit.CH_MAP_7 = 1;
	CT_INTC.CMR4_bit.CH_MAP_16 = 6;		// Map event 16 to channel 6
	CT_INTC.CMR4_bit.CH_MAP_17 = 7;		// Map event 17 to channel 7
	
	CT_INTC.HMR0_bit.HINT_MAP_1 = 1;
	CT_INTC.HMR1_bit.HINT_MAP_6 = 6;	// Map channel 6 to host 6
	CT_INTC.HMR1_bit.HINT_MAP_7 = 7;	// Map channel 7 to host 7
	
	CT_INTC.SECR0 = 0xFFFFFFFF;
	CT_INTC.SECR1 = 0xFFFFFFFF;
	CT_INTC.ESR0 = 0xFFFFFFFF;
	CT_INTC.ESR1 = 0xFFFFFFFF;


	//CT_INTC.SICR = 16;					// Ensure event 16 is cleared
	//CT_INTC.SICR = 17;					// Ensure event 17 is cleared

	//CT_INTC.EISR = 16;					// Enable event 16
	//CT_INTC.EISR = 17;					// Enable event 17

	//CT_INTC.HIEISR = 0;			// Enable Host interrupt 1
	CT_INTC.HIEISR = 1;
	CT_INTC.HIEISR = 6;
	CT_INTC.HIEISR = 7;
	
	CT_INTC.HIER = 0xFFFFFFFF;

//	CT_INTC.GER = 1; 					// Globally enable host interrupts

//Clear the status of all interrupts
//	CT_INTC.ECR0 = 0xFFFFFFFF;
//	CT_INTC.ECR1 = 0xFFFFFFFF;

//	CT_INTC.ESR0 = 0xFFFFFFFF;
//	CT_INTC.ESR1 = 0xFFFFFFFF;

	//CT_INTC.GER_bit.EN_HINT_ANY = 0x1;
	CT_INTC.GER = 1;
........
	CT_INTC.SECR0 = (1 << 16);
//		CT_INTC.SRSR0 = (1 << 16);
	__R31 = 0b100000;
	__R31 = 0b100001;

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