I answered another key question myself. The Boot button must be held at POWER CYCLE. It is not enough to hold the boot button while pressing the reset button.
To quote the chip manual:
“SYSBOOT[15:0] terminals are respectively LCD_DATA[15:0] inputs, latched on the rising edge of PWRONRSTn.”
This signal is on ball B15 in the datasheet and labelled PORZn w/ net PMIC_PGOOD in the BBB schematics.
The reset button generates a low on ball A10, datasheet signal WARMRSTn, labelled NRESET_INOUT and net SYS_RESETn in the BBB schematics.
(I don’t remember having to do this on the original beagleboard. I have to go back and check now.)
I have verified this this way:
power via 5V barrel
nothing in uSD slot
FTDI cable attached to 6 pin header
no other connections (esecially no uUSB)
Hold BOOT button while connecting 5V, get CCCCC XMODEM download attempt on UART
Don’t hold BOOT button connecting 5V, boot from eMMC
So to summerize the current state w/ stoc