Hi,
I am using a BeagleBoard C2 with a kernel 2.6.32 and I have been
struggling since the last week trying to render video in a V421 Nec
display but I am having some difficulties.
1. None of the standard resolutions are working (I got "input not
supported" message in my display) when I use "MR" (dynamically
computing timings based on CVT standards as I understood) in the video
mode.The only resolution that worked was for omapfb.mode=dvi:
1440x1050MR-16@60'.
When I get the timings:
# cat /sys/devices/platform/omapdss/display0/timings
86400,1440/80/48/32,1050/3/17/10
I realized that VFreq is 50 Hz instead of 60 Hz.
Modeline for this resolution (used in 3.)
"1440x1050" 86.4 1440 1520 1552 1600 1050 1053 1063 1080
2. When I do not use "MR" (to get a modeline config from modedb[ ])
the only resolution working is 800x600@60, which has the following
timings:
NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4, //modedb format
"800x600" 40 800 888 1016 1056 600 623 627 628 //modeline format
3. Then I realized that if I generate modelines based on the timings
from the modelines of the working resolutions ( 1440x1050@50 or
800x600@60) any resolution (smaller than the base resolution) can be
displayed:
i.e., if I want 720p I base on:
"1440x1050" 86.4 1440 1520 1552 1600 1050 1053 1063 1080
and just modify the horizontal and vertical front porch:
"1280x720" 86.4 1280 1520 1552 1600 720 1053 1063 1080
This works, the only drawback is that I am using a pixelclock higher
than the ideal (is this a real drawback? or is is there another
drawback?) and that the vertical frequency is 50Hz.
I do something similar if I want to 640x480@60, I base on:
"800x600" 40 800 888 1016 1056 600 623 627 628
And modify it to:
"640x480" 40 640 888 1016 1056 480 623 627 628
(After I convert it to what modedb[] struct expects and add/modify an
entry in this structure).
4. From the EDID and the technical sheets of the display the only
constrains are:
hfreq 15.625/15.734 kHz, 31.5 kHz - 91.1 kHz
vfreq 50.0 - 85.0 Hz
pixclock 25.0 MHz - 165.0 MHz
But in all cases I am fulfilling these requirements.
5. In the EDID there is an example to set a 720p@60 resolution, the
modeline is the following:
a) "1280x720" 74.250 1280 1390 1430 1650 720 725 730 750
This is very similar as the one from [1] which is:
b) "1280x720" 74.250 1280 1500 1540 1650 720 740 745 750
The only difference is when the sync pulses start.
However when I use any of these modes and then read the timing from
the Beagle I get ( i.e. configuring a) )
# cat /sys/devices/platform/omapdss/display0/timings
72000,1280/110/220/40,720/5/20/5
which is:
"1280x720" 72 1280 1390 1430 1650 720 725 730 750
All the settings are the same but the pixelclock which is 72MHz
instead of 74.25!, I found the same behavior for most of the
resolutions. I observed that the pixelclock is set to something
different it is configure, is there a restriction in the pixel clock
value?
6) I also tried setting modelines generated from excel sheet from VESA
and cvt command but no luck.
My conclusion is that the NEC display supports all these resolutions
but it seems it is very picky about the timings (an LG and Viewsonic
display work very well for me with out touching the kernel) so I would
like some suggestions mostly to have 720p@60 working (as mentioned
before I am only able to set 720p@50) , if anyone have a clue of this
weird behavior of (so far) only two modelines working.
Thanks in advanced.
Juan Garibay
For those new to display timings (like me 
I recommend:
http://sgf-dma.blogspot.com/2011/01/notes-for-xfree86-video-timings-howto.html
http://www.epanorama.net/documents/vga2rgb/timings.html
http://groups.google.com/group/beagleboard/browse_thread/thread/155dc4da296be2e9/2bfbaa25cd74c913?lnk=gst&q=fbmode#2bfbaa25cd74c913