Kernel 3.12.x / GPMC

I have done some tests initializing the device tree. The file I have used does work in kernel 3.8.13 without any issues. However, kernel 3.12.13 causes lots of trouble.

My .dts file is as follows:

/*

  • optargs=capemgr.disable_partno=BB-BONE-EMMC-2G
  • “arch/arm/boot/dts/am335x-boneblack.dts”, find the section starting
  • with “&mmc2 {” and in section change status = “okay” into “disabled”.
  • do once : mmc dev 1
  • mmc rstn 1
  • in uBoot or in uEnv and then delete
    */

/dts-v1/;
/plugin/;

/ {
compatible = “ti,beaglebone”, “ti,beaglebone-black”;

/* identification */
part-number = “BB-BONE-MARK1”;
version = “00A1”;

/* state the resources this cape uses /
exclusive-use =
/
the pin header uses /
“P8.25”, /
gpmc: gpmc_ad0 /
“P8.24”, /
gpmc: gpmc_ad1 /
“P8.5”, /
gpmc: gpmc_ad2 /
“P8.6”, /
gpmc: gpmc_ad3 /
“P8.23”, /
gpmc: gpmc_ad4 /
“P8.22”, /
gpmc: gpmc_ad5 /
“P8.3”, /
gpmc: gpmc_ad6 /
“P8.4”, /
gpmc: gpmc_ad7 /
“P8.19”, /
gpmc: gpmc_ad8 /
“P8.13”, /
gpmc: gpmc_ad9 /
“P8.14”, /
gpmc: gpmc_ad10 /
“P8.17”, /
gpmc: gpmc_ad11 /
“P8.12”, /
gpmc: gpmc_ad12 /
“P8.11”, /
gpmc: gpmc_ad13 /
“P8.16”, /
gpmc: gpmc_ad14 /
“P8.15”, /
gpmc: gpmc_ad15 /
“P9.13”, /
gpmc: gpmc_wpn /
“P8.21”, /
gpmc: gpmc_csn1 /
“P8.18”, /
gpmc: gpmc_clk /
“P8.7”, /
gpmc: gpmc_advn_ale /
“P8.8”, /
gpmc: gpmc_oen_ren /
“P8.10”, /
gpmc: gpmc_wen /
“P8.9”, /
gpmc: gpmc_ben0_cle */

“P9.18”,
“P9.22”,

“gpmc”,
/* the reset pin */
“eMMC_RSTn”;

#address-cells = <1>;
#size-cells = <1>;

fragment@0 {
target = <&am33xx_pinmux>;
overlay {

gpmc_pins: pinmux_gpmc_pins {
pinctrl-single,pins = <
0x000 0x30 /* gpmc_ad0.gpmc_ad0 MODE0 | INPUT | PULLUP /
0x004 0x30 /
gpmc_ad1.gpmc_ad1 MODE0 | INPUT | PULLUP /
0x008 0x30 /
gpmc_ad2.gpmc_ad2 MODE0 | INPUT | PULLUP /
0x00C 0x30 /
gpmc_ad3.gpmc_ad3 MODE0 | INPUT | PULLUP /
0x010 0x30 /
gpmc_ad4.gpmc_ad4 MODE0 | INPUT | PULLUP /
0x014 0x30 /
gpmc_ad5.gpmc_ad5 MODE0 | INPUT | PULLUP /
0x018 0x30 /
gpmc_ad6.gpmc_ad6 MODE0 | INPUT | PULLUP /
0x01C 0x30 /
gpmc_ad7.gpmc_ad7 MODE0 | INPUT | PULLUP /
0x020 0x30 /
gpmc_ad8.gpmc_ad8 MODE0 | INPUT | PULLUP /
0x024 0x30 /
gpmc_ad9.gpmc_ad9 MODE0 | INPUT | PULLUP /
0x028 0x30 /
gpmc_ad10.gpmc_ad10 MODE0 | INPUT | PULLUP /
0x02C 0x30 /
gpmc_ad11.gpmc_ad11 MODE0 | INPUT | PULLUP /
0x030 0x30 /
gpmc_ad12.gpmc_ad12 MODE0 | INPUT | PULLUP /
0x034 0x30 /
gpmc_ad13.gpmc_ad13 MODE0 | INPUT | PULLUP /
0x038 0x30 /
gpmc_ad14.gpmc_ad14 MODE0 | INPUT | PULLUP /
0x03C 0x30 /
gpmc_ad15.gpmc_ad15 MODE0 | INPUT | PULLUP /
0x080 0x08 /
gpmc_cscn1.gpmc_cscn1 MODE0 | OUTPUT /
0x08C 0x28 /
gpmc_clk.gpmc_clk MODE0 | OUTPUT /
0x090 0x08 /
gpmc_advn_ale.gpmc_advn_ale MODE0 | OUTPUT /
0x094 0x08 /
gpmc_oen_ren.gpmc_oen_ren MODE0 | OUTPUT /
0x098 0x08 /
gpmc_wen.gpmc_wen MODE0 | OUTPUT /
0x09C 0x08 /
gpmc_ben0_cle.gpmc_ben0_cle MODE0 | OUTPUT /
0x078 0x08 /
gpmc_ben1_cle.gpmc_ben1_cle MODE0 | OUTPUT */

;
};

fpga_config_pins: pinmux_fpga_config_pins {
pinctrl-single,pins = <
/* config clk and data /
0x158 0x17 /
spi1_d1 MODE3 | INPUT | PULLUP , serial data config /
0x150 0x17 /
spi1_sclk MODE3 | INPUT | PULLUP, serial clock config */

;
};
};
};

fragment@1 {
target = <&gpmc>;
depth = <1>; /* only create devices on depth 1 */

/* stupid warnings */
#address-cells = <1>;
#size-cells = <1>;

overlay {

status = “okay”;

#address-cells = <2>;
#size-cells = <1>;

pinctrl-names = “default”;
pinctrl-0 = <&gpmc_pins>;

/* chip select ranges */
ranges = <1 0 0x01000000 0x1000000>;

camera{
compatible = “mark1”;
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&fpga_config_pins>;

reset = <&rstctl 0 0>;
reset-names = “eMMC_RSTn-MARK1”;

reg = <1 0 0x01000000>; /CSn1/

bank-width = <2>; /* GPMC_CONFIG1_DEVICESIZE(1) */

/gpmc,burst-write;/
gpmc,burst-read;
gpmc,burst-wrap;
gpmc,sync-read; /* GPMC_CONFIG1_READTYPE_ASYNC /
gpmc,sync-write; /
GPMC_CONFIG1_WRITETYPE_ASYNC /
gpmc,clk-activation-ns = <0>; /
GPMC_CONFIG1_CLKACTIVATIONTIME(2) /
gpmc,burst-length = <16>; /
GPMC_CONFIG1_PAGE_LEN(2) /
gpmc,mux-add-data = <2>; /
GPMC_CONFIG1_MUXTYPE(2) */

gpmc,sync-clk-ps = <20000>; /* CONFIG2 */

gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <100>;
gpmc,cs-wr-off-ns = <40>;

gpmc,adv-on-ns = <0>; /* CONFIG3 */
gpmc,adv-rd-off-ns = <20>;
gpmc,adv-wr-off-ns = <20>;

gpmc,we-on-ns = <20>; /* CONFIG4 */
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <20>;
gpmc,oe-off-ns = <100>;

gpmc,page-burst-access-ns = <20>; /* CONFIG 5 /
gpmc,access-ns = <80>;
gpmc,rd-cycle-ns = <120>;
gpmc,wr-cycle-ns = <60>;
gpmc,wr-access-ns = <40>; /
CONFIG 6 */
gpmc,wr-data-mux-bus-ns = <20>;

/gpmc,bus-turnaround-ns = <40>;/ /* CONFIG6:3:0 = 4 /
/gpmc,cycle2cycle-samecsen;/ /
CONFIG6:7 = 1 /
/gpmc,cycle2cycle-delay-ns = <40>;/ /
CONFIG6:11:8 = 4 */

/* not using dma engine yet, but we can get the channel number here */
dmas = <&edma 20>;
dma-names = “mark1”;

fpga,config {
i2c-adapter = <&i2c2>;

/* need it to stop the whinning */
#address-cells = <1>;
#size-cells = <0>;

/* fake i2c device node */
pca9534 {
compatible = “mark1”;
reg = <0x70>;
};
};

};

};
};

fragment@2 {
target = <&spi0>;
overlay {
#address-cells = <1>;
#size-cells = <0>;
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&fpga_config_pins>;

spi0_0{
#address-cells = <1>;
#size-cells = <0>;
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <16000000>;
spi-cpha;
};
spi0_1{
#address-cells = <1>;
#size-cells = <0>;
compatible = “spidev”;
reg = <1>;
spi-max-frequency = <16000000>;
// Mode 0 (CPOL = 0, CPHA = 0)
};
};
};

};

When trying to initialize the device tree using cape manager the follow warnings appear:
[ 50.062951] of_resolve: Could not find symbol ‘rstctl’
[ 50.070191] bone-capemgr bone_capemgr.6: slot #7: Failed to resolve tree

The symbol rstctl has indeed been removed from am335x-boneblack.dts & am335x-bone-common.dts. How exactly are we supposed to activate the reset pin for the eMMC?

When commenting out the line ‘reset = <&rstctl 0 0>;’ the result is as follows:
[ 47.473573] pinctrl-single 44e10800.pinmux: pin 44e10800.0 already requested by 481d8000.mmc; cannot claim for 50000000.gpmc
[ 47.501440] pinctrl-single 44e10800.pinmux: pin-0 (50000000.gpmc) status -22
[ 47.523657] pinctrl-single 44e10800.pinmux: could not request pin 0 (44e10800.0) from group pinmux_gpmc_pins on device pinctrl-single
[ 47.541533] omap-gpmc 50000000.gpmc: Error applying setting, reverse things back

It seems to be impossible to access the GPMC even if we ignore the reMMC reset problem. Does anybody know whats going on? Is there anybody out there who has done any tests of the GPMC functionality under a 3.12 kernel?

I don't think capemgr/device tree overlays are supported anymore. Robert Nelson has proposed another solution with 3.13.x kernels that seems to work for me:

https://github.com/RobertCNelson/linux-dev/commit/685b182ca956dcd8396ca69af5c678c43a102d03

HTH,

Dave.

The page links to github and shows lots of changes. Do you have more information on this proposed solution? Is there a documentation available somewhere?

So we don’t even have a cape manager in newer kernels for the BBB? Is that really true? Is there anybody out there who knows more about this topic? How exactly does it work to load device tree settings during runtime without a cape manager?

Without a cape manager you don't load device tree anything at runtime,
you compile any device tree changes into the dtb loaded at boot time.

If this bothers you enough, you can port the cape manager kernel feature
to the newer kernels. Otherwise, there is some talk that this work may
be part of the Google Summer of Code projects.