Memory Cape

Anyone out there got any reference software for this Memory cape?

http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion

Any reference would be helpful.

Thanks

Any pointers on the Memory cape software?
I am particularly looking at NOR flash and SPI flash - any software
reference for beaglebone would help greatly.

Thanks.

None of the images supplied will support these capes. You will need to rebuild the SW for NOR or NAND or whatever you desire to use and whatever device you have. You need to decide what is in these devices, SPL, UBoot, etc and then have some place to go to load the rest in he case of NOR as it is pretty small. Basically, TI is doing some work on this, but it has not made it out of TI yet. I know it works and I know they are working on documenting it. But, you will need to create the files based on your needs and kernel you plan to use, assuming you even use one.

I will ping them to see where they are, but do not expect anything immediately. I suggest you post this to the TI E2E forum and get this into the TI system.

Gerald

None of the images supplied will support these capes. You will need to
rebuild the SW for NOR or NAND or whatever you desire to use and whatever
device you have. You need to decide what is in these devices, SPL, UBoot,
etc and then have some place to go to load the rest in he case of NOR as it
is pretty small. Basically, TI is doing some work on this, but it has not
made it out of TI yet. I know it works and I know they are working on
documenting it. But, you will need to create the files based on your needs
and kernel you plan to use, assuming you even use one.

This has become a lot easier with devicetree, at least in the kernel.
[1] is an example. [2] is another. If the EEPROM has the information
about the connected memory, instantiating the necessary driver should
be fairly straight-forward. I believe base support for NAND/NOR is
readily there. This should make it such that when the kernel is
booted, you can read/write from these memory devices. If these capes
are sent to me, I can put the necessary .dts files in for testing out
things with the kernel [3].

U-boot/SPL would be a bit more work with need to edit configuration
header files and a bit of C code. Again, I believe the base support
for NAND/NOR is there, but the configuration process is a bit more
difficult.

If you want the ROM to read it at boot, then you also need to author
the particular boot image and somehow configure the boot pins.

[1] linux/firmware/capes/cape-bone-2g-emmc1.dts at v3.8-rc4-20130123-0 · jadonk/linux · GitHub
[2] linux/firmware/capes/BB-BONE-LCD7-01-00A2.dts at v3.8-rc4-20130123-0 · jadonk/linux · GitHub
[3] GitHub - beagleboard/kernel at 3.8

None of the images supplied will support these capes. You will need to
rebuild the SW for NOR or NAND or whatever you desire to use and whatever
device you have. You need to decide what is in these devices, SPL, UBoot,
etc and then have some place to go to load the rest in he case of NOR as it
is pretty small. Basically, TI is doing some work on this, but it has not
made it out of TI yet. I know it works and I know they are working on
documenting it. But, you will need to create the files based on your needs
and kernel you plan to use, assuming you even use one.

This has become a lot easier with devicetree, at least in the kernel.
[1] is an example. [2] is another. If the EEPROM has the information
about the connected memory, instantiating the necessary driver should
be fairly straight-forward. I believe base support for NAND/NOR is
readily there. This should make it such that when the kernel is
booted, you can read/write from these memory devices. If these capes
are sent to me, I can put the necessary .dts files in for testing out
things with the kernel [3].

Guess its time for the designer of board to contact you. I dont know
who that is.
This will serve as a very good reference design.

We have a NOR flash on our Beagle Bone based system, and right now
we are stuck using SD card.

Is it that till date _NO_ product is shipped with NOR/NAND memory then?

None of the images supplied will support these capes. You will need to
rebuild the SW for NOR or NAND or whatever you desire to use and whatever
device you have. You need to decide what is in these devices, SPL, UBoot,
etc and then have some place to go to load the rest in he case of NOR as it
is pretty small. Basically, TI is doing some work on this, but it has not
made it out of TI yet. I know it works and I know they are working on
documenting it. But, you will need to create the files based on your needs
and kernel you plan to use, assuming you even use one.

This has become a lot easier with devicetree, at least in the kernel.
[1] is an example. [2] is another. If the EEPROM has the information
about the connected memory, instantiating the necessary driver should
be fairly straight-forward. I believe base support for NAND/NOR is
readily there. This should make it such that when the kernel is
booted, you can read/write from these memory devices. If these capes
are sent to me, I can put the necessary .dts files in for testing out
things with the kernel [3].

Guess its time for the designer of board to contact you. I dont know
who that is.
This will serve as a very good reference design.

We have a NOR flash on our Beagle Bone based system, and right now
we are stuck using SD card.

Is it that till date NO product is shipped with NOR/NAND memory then?

I know some systems have shipped. This is much more about providing a simple reference.

I did respond to you as the designer. But I received no response.

Gerald

Gerald

None of the images supplied will support these capes. You will need to
rebuild the SW for NOR or NAND or whatever you desire to use and whatever
device you have. You need to decide what is in these devices, SPL, UBoot,
etc and then have some place to go to load the rest in he case of NOR as it
is pretty small.

Angstrom filesystem is what i am using.
So i would like to have NOR have similar partitions just like a micro SD card.
Can ROM boot out of NOR flash - if yes, then SPL and uboot would go there too.

The kernel is use is 3.2.32 and hence it does not use device tree yet.

If you have any references of how you got your board to work, that
would be a great help.

I did respond to you as the designer. But I received no response.

Ah. That is good to know - excues since i missed your reply.
Have replied on the thread now.

Any help is greatly appreciated.

As indicated on the product page, there is no SW for the board. It is for development purposes. We are working to have something from TI on this, but it isn’t there yet. We have a lot of customers who have this working. all with their own SW. No two are the same. Booting from NAND is a fundamental change from a SD boot architecture. No matter what we come up with, it will not meet everyone’s needs. All we can do is provide examples and let each user take it form there. That is what we are working on.

Gerald

Gerald

As indicated on the product page, there is no SW for the board. It is for
development purposes. We are working to have something from TI on this, but
it isn't there yet. We have a lot of customers who have this working. all
with their own SW. No two are the same. Booting from NAND is a fundamental
change from a SD boot architecture. No matter what we come up with, it will
not meet everyone's needs. All we can do is provide examples and let each
user take it form there.

Yes that is exactly what i want - a reference working implementation.

That is what we are working on.

Any particular time frame you might be able to give?
Then i need to decide if i can leverage from your work - or do i go
all out doing my own exploration.
Former will definitely give me a good lead time.

Is it possible at all for AM335x processor to boot totally out of NOR
(spl, u-boot, uImage, fs)?

Time frame? I just spoke with the guys, and maybe in a couple of weeks. I gave them an easier path to get it out, and they are looking into it. They are trying to pull it all together.

Yes, it is possible for AM335x to boot from all of those. It is covered in the Technical Reference Manual for the AM335x…The question is how big the device is and how much space is needed for everything, SPL, UBOOT, Kernel, Filesystem, etc…

Gerald