MMC/SD/SDIO Controller initialization sequence


This is regarding the MMC/SD/SDIO Controller initialization.

There is a little bit confusion in the initialization sequence of MMC/SD/SDIO Controller.

The AM335x TRM(SPRUH73E) page 3575, has a flow chart “MMC/SD/SDIO Controller Bus Configuration Flow”
and it says “For initialization sequence, you should have 80 clock cycles in 1ms.
It means clock frequency should be 80 kHz”
But there is no option to select the clock <=80 kHz in the MMC/SD/SDIO Controller.

I found the mmc.c code below related to OMAP35x MMC/SD/SDIO Controller…
in this code, there is part saying “/* 5: MMCHS Controller INIT Procedure Start */”
in which it is executing the above initialization sequence.

But,I couldn’t find the above initialization sequence in case of BeagleBone mmc driver.

Is the initialization sequence “80 clock cycles in 1ms” required for MMC/SD/SDIO Controller?

Please let us know if there is any comments about the 80 clock cycles…

Thank you.