[PATCH] U-Boot v1: ARM: OMAP: Improve pixel clock workaround

Steve,

I had a look to your uboot pixel clock workaround

http://www.sakoman.net/cgi-bin/gitweb.cgi?p=u-boot-omap3.git;a=blobdiff;f=board/omap3530beagle/omap3530beagle.c;h=0bdfb7287fcdc7799aac6c371072a9fc60571c86;hp=7d9a5668ee11f2f86edbb73f8ea25c76e9939a3d;hb=2873db212b96c4306df879620523e74874450fb4;hpb=b7e8f672064a68be53886333176ef400290bf40b

Thanks for this!

What do you think about patch below to make this workaround a little bit more compatible to existing code? Compile tested only.

Dirk

dss_patch.txt (1.32 KB)

Dirk,

Thanks! Much cleaner of course.

I worry that a divisor of 1 might not work. I tried it yesterday and
the system would not boot with that value, I had to use 2.

I will try again later today to verify.

Steve

Dirk,

My board will not boot with a dss1 value of 1. I checked in your
improved patch but with a value of 2 -- works just as before.

Steve

sakoman wrote:

Dirk,

My board will not boot with a dss1 value of 1. I checked in your
improved patch but with a value of 2 -- works just as before.

With higher dss1 rates, you'll need something like this[1] patch to
ensure the dispc clock after lcd is below 173 MHz. Without this,
very strange things can happen to the display.

1.
http://git.mansr.com/?p=linux-omap;a=commit;h=0523ece1bad659c48c66aea364d83f7490e7e5ae

sakoman wrote:

> Dirk,

> My board will not boot with a dss1 value of 1. I checked in your
> improved patch but with a value of 2 -- works just as before.

With higher dss1 rates, you'll need something like this[1] patch to
ensure the dispc clock after lcd is below 173 MHz. Without this,
very strange things can happen to the display.

1.http://git.mansr.com/?p=linux-omap;a=commit;h=0523ece1bad659c48c66aea

For the people using OE: that patch (and others) are already applied:

http://gitweb.openembedded.net/?p=org.openembedded.dev.git;a=commitdiff;h=c7be2f3d0445df58161d089994d301a3491d55ea

regards,

Koen

Måns Rullgård wrote:

sakoman wrote:

Dirk,

My board will not boot with a dss1 value of 1. I checked in your
improved patch but with a value of 2 -- works just as before.

With higher dss1 rates, you'll need something like this[1] patch to
ensure the dispc clock after lcd is below 173 MHz. Without this,
very strange things can happen to the display.

1.
http://git.mansr.com/?p=linux-omap;a=commit;h=0523ece1bad659c48c66aea364d83f7490e7e5ae

Thanks!

Is this patch uboot independent? I.e. does it work with and without our patch

http://www.sakoman.net/cgi-bin/gitweb.cgi?p=u-boot-omap3.git;a=blobdiff;f=include/asm-arm/arch-omap3/clocks_omap3.h;h=fdb0c4c47d7685dd8bf1d7615224f18a6a59e1e1;hp=9bb47005f713df6a36bf462ea6a37055a10f154f;hb=4adcbd073c4892851d1e5cc3d369bb9307df72cb;hpb=9acb7be501ed151824ca6c7ec94e0b50ba80d11e

?

If this patch works indepenent, e.g. with PER_M4X2 == 2, PER_M4X2 == 9 or whatever, we should send this patch to OMAP list?

Thanks,

Dirk