porting from x86 to omap3 (arm)

Ben,

Accessing data using a pointer shouldn't make a difference.

I checked the Cortex-A8 Technical Reference Manual section 4.2 and it
says that Cortex-A8 supports unaligned words and half-words, but
doesn't say anything about doubles. It may be that double words must
be aligned.

In your example, "#pragma pack(1)" aligns all fields to byte
boundaries. This aligns double field fld4 to an odd address, since it
immediately follows the char. This is consistent with your alignment
trap at address 0x000105E5 which is also odd.

Is there a particular reason that the structures must be packed to
byte boundaries? If not, it may work to remove the #pragma pack
directives and let the compiler align fields to its preferred
boundaries. Your code will run faster as well.

The 8088 processor in the original IBM PC had an 8-bit data bus, so
there was no penalty for non-aligned access. The x86 compilers
therefore preferred to pack structures as tighly as possible to fit
into those 64KB segments.

John

John Beetem <johnbeetem@yahoo.com> writes:

Ben,

Accessing data using a pointer shouldn't make a difference.

I checked the Cortex-A8 Technical Reference Manual section 4.2 and it
says that Cortex-A8 supports unaligned words and half-words, but
doesn't say anything about doubles. It may be that double words must
be aligned.

The alignment requirement depends on the instructions used for
load/store. The VLDR and VLDM instructions (formerly FLDD/FLDS and
FLDMD/FLDMS) require 4-byte alignment. The VLDn (n=1,2,3,4) NEON
instructions take an optional alignment specifier. If no alignment is
specified, none is required; otherwise, the specified alignment is
required. If the A bit in the System Control Register is set,
strict alignment is always required.

When compiling normal floating-point code for Cortex-A8, gcc tends to
issue VLDR instructions for loads.