Powering off Beaglebone while power is still applied - still draws 600mA

I hope this makes sense… I have an application there the Beaglebone will always be supplied with 5V. I need a way to fully power off the bone so that it does not draw any current. If I do “shutdown now”, the system is halted, but the LCD is still on, the ethernet lights still flash, and the user LEDs still blink. Even though the system is “shutdown”, it still draws 600+ mA, just like the thing is still running.

I need the bone to draw as litle current as possible when I shut it down… how do I do this?

Write to the PMIC via I2C and shut it down. Check the TPS65217B datasheet.


Write to the PMIC via I2C and shut it down. Check the TPS65217B

Well, that should work great, so long as you never want to boot again
without a full (no power sources present for at least a brief period)
power cycle. At least that's what I found.

Setting ALARM2 in the RTC within am335x will drop PMIC_PWR_EN properly
and shut the PMIC down such that on power button or any new power source
arriving (other than battery) will power you back up. Just make sure
you set the PMIC to OFF mode and not SLEEP mode before dropping
PMIC_PWR_EN. SLEEP mode doesn't work due to am335x RTC errata.

If you keep 5V present via the power jack or through the expansion
headers, you'll still see a few mA of current draw due to the over
voltage protection but it's pretty low.

Also see a whole bunch of posts involving me and the lovely TPS65217:


Well, you do need a power button or something to ground the power button pin on the PMIC to wake it up.


Right… we do have a line connected to the SYSTEM_RESET pin to power up the bone once it has been turned off.

That won’t power it up if you shutdown the PMIC to remove the power. With that method, you would need to turn off the rails that you can, such as I/O voltages and leave the processor running in order to be able to detect the SYS_RESET, which is a warm reset.


Ok, so you’re saying I need to use the PWR_BUT pin to turn on the bone, rather that using the SYS_RESET pin?

Yes. I guess I assumed that was implied :slight_smile:

Plugging in a new power source works as a wakeup, too, such as if
you're in OFF mode and are on AC power, if you plug a USB in it'll


I guess I read too fast… :slight_smile: I see that you and Gerald mentioned the power button pin. Ok, I’ll read through your posts and try to get this implemented. Thanks for your help!

Yes. There is a fundamental difference between SYS_RESET AND PWR_BUT. The SYS_RESET only resets the CPU itself and peripherals. It however does not reconfigure your SYSBOOT pins. This is because SYS_RESET will not trigger AM3359 pin, which acts as reset-reconfigure. This particular pin is connected to PMIC_PGOOD. Hence the AM3359 reloads the SYSBOOT configuration only and only on power-up. This is quite unlucky as if you have the beaglebone connected to FPGA, which loads its configuration on the fly, you’re in the troubles (probably not your case, but I mention it here in the concept of explanation).

One way how to go out of this situation is to use PWR_BUT pin. If you ground this pin for more than ~8 seconds, the PMIC will power off. Completely. In order to turn it on again a small GND glitch on the same pin will do the job. You might be able to turn off completely PMIC by I2C command, but that I did not test.

Another possibility - if you design your own power supply - is to use DCDC converters like PT6302A from TI, which has already a shut-down pin. Driven from whatever you want you gain remote turn-on/off capability.

I’d say that this SYSBOOT thing is rather a design fault, or misconception, as apparently BB designers assume, that the ‘correct’ way to use BB is to fix it once forever for a given configuration. When you plug e.g. a NAND module, this is perfectly fine as it stays forever. However if you connect BB to FPGA, you want to have a choice of boot media at runtime. But due to the nature of FPGA (i.e. need to load fusebits after the reset) one is not able to put correct SYSBOOT configuration before the FPGA starts. But this is a point, where BB samples SYSBOOT.


Dne čtvrtek, 4. dubna 2013 22:18:26 UTC+2 Brent napsal(a):

For those who are reading this, I actually found a solution that was posted a few months ago by colinfp. I have attached his patch below, as well as the link to the thread. Once you add this and rebuild the kernel it will completely power off the bone and only draw around 25mA when you send the command “poweroff” or “shutdown now”. Thanks for everyone’s help!


0071-beaglebone-poweroff.patch (4.24 KB)