Problems with the output pulse-code signal from PRU

Hello everyone!

I created the PRU programm, wich takes <Hello_world> from C host programm. C host writes each byte to PRU DATA RAM0. PRU programm takes this value and transfer to pulse-code signal on GPIO. I created macros “SEND” for this (TRSBNI.hp). But it’s works incorrectly: some values, like a 100, are transferred wrong (some fronts are formed incorrectly) . I checked output with oscilloscope. Any ideas? (attach codes and archive)

`

.origin 0
.entrypoint START
#include “TRSBNI.hp”

#define OUT r30.t15

START:
LBCO r0, C24, 0, 1
QBEQ EXIT, r0, 2
//***********************************************************************************
LDI r2, 1
DOWNLOAD:
LDI r1, 100 // checking for a certain value
//LBCO r1, C24, 1, 4 // value from DATA RAM 0
SEND OUT, r1, 8, 5 // send to GPIO
//ADD r2, r2, 1 // for next byte
//QBNE DOWNLOAD, r2, 11 // переход, пока r2 не равен 11.
QBA START

EXIT:
// Interrupt the host so it knows we’re done
mov r31.b0, 19 + 16

`

`

#define reg1 R29
#define reg2 R28

.macro SEND
.mparam dst, src, cnt1, cnt2 //cnt1 - number of bits, cnt2 - delay

INIT:
LDI reg1, cnt1+1 // starting values
LDI reg2, 0

CHS: // 0 or 1
SUB reg1, reg1, 1
QBEQ CLOSE, reg1, 0 // Close, when byte reading
QBBS SETR1, src.t0 //
QBBC CLRR1, src.t0 //
SETR1: //
SET dst //
ADD reg2, reg2, 1 //
QBNE SETR1, reg2, cnt2 //
LDI reg2, 0 //

SETR0:
CLR dst // for pulse-code. 1 - it’s from 1 to 0
ADD reg2, reg2, 1
QBNE SETR0, reg2, cnt2 // delay
LSR src, src, 1 //
LDI reg2, 0 //
QBA CHS
CLRR1: //
CLR dst //
ADD reg2, reg2, 1 //
QBNE CLRR1, reg2, cnt2 //
LDI reg2, 0 //
CLRR0: // for pulse-code. 0 - it’s from 0 to 1
SET dst //
ADD reg2, reg2, 1 //
QBNE CLRR0, reg2, cnt2 //
LSR src, src, 1 //
LDI reg2, 0 //
QBA CHS
CLOSE:
LDI reg1, 0 //
LDI reg2, 0
.endm

`

HW_from_pru.zip (3.49 KB)

hm, im sure, it’s connected with delay for executed each coommand. Label SETR1 and CLRR1 executed faster, then SETR0 and CLRR0. It is only necessary to choose the delay time for SETR0 and CLRR0 correctly.