Problems with XDS100v2 and Beagleboard Black

Hi All

My brains are fried from banging against a particularly hard software wall and I need some help.

I have bought an XDS100v2 emulator and a Beagleboard black and soldered on the connector. I have loaded the Starterware package and CCS5 onto my Ubuntu 12.04LTS PC. I have rebuild all of the libraries and I am trying to load the LED flashing example program.

I have set up the debug session according to this web page:

http://processors.wiki.ti.com/index.php/AM335X_StarterWare_Environment_Setup#Debugging_on_BeagleBone_board_using_CCSv5

However, when I launch the debugger I always get this:

CortxA8: Output: **** AM335x Beaglebone Initialization is in progress …
CortxA8: Output: **** AM335x ALL PLL Config for OPP == OPP100 is in progress …
CortxA8: Output: Input Clock Read from SYSBOOT[15:14]: 24MHz
CortxA8: Output: **** Going to Bypass…
CortxA8: Output: **** Bypassed, changing values…
CortxA8: Output: **** Locking ARM PLL
CortxA8: Output: **** Core Bypassed
CortxA8: Output: **** Now locking Core…
CortxA8: Output: **** Core locked
CortxA8: Output: **** DDR DPLL Bypassed
CortxA8: Output: **** DDR DPLL Locked
CortxA8: Output: **** PER DPLL Bypassed
CortxA8: Output: **** PER DPLL Locked
CortxA8: Output: **** DISP PLL Config is in progress …
CortxA8: Output: **** DISP PLL Config is DONE …
CortxA8: Output: **** AM335x ALL ADPLL Config for OPP == OPP100 is Done …
CortxA8: Output: **** AM335x DDR2 EMIF and PHY configuration is in progress…
CortxA8: Output: EMIF PRCM is in progress …
CortxA8: Output: EMIF PRCM Done
CortxA8: Output: DDR PHY Configuration in progress
CortxA8: Output: Waiting for VTP Ready …
CortxA8: Output: VTP is Ready!
CortxA8: Output: DDR PHY CMD0 Register configuration is in progress …
CortxA8: Output: DDR PHY CMD1 Register configuration is in progress …
CortxA8: Output: DDR PHY CMD2 Register configuration is in progress …
CortxA8: Output: DDR PHY DATA0 Register configuration is in progress …
CortxA8: Output: DDR PHY DATA1 Register configuration is in progress …
CortxA8: Output: Setting IO control registers…
CortxA8: Output: EMIF Timing register configuration is in progress …
CortxA8: Output: EMIF Timing register configuration is done …
CortxA8: Output: PHY is READY!!
CortxA8: Output: DDR PHY Configuration done
CortxA8: Output: **** AM335x Beaglebone Initialization is Done ******************
CortxA8: Breakpoint Manager: Retrying with a AET breakpoint
CortxA8: Trouble Setting Breakpoint with the Action “Semi hosting” at 0x800013e8: (Error -1066 @ 0x333C) Unable to set requested breakpoint in memory. Verify that the breakpoint address is in writable memory. (Emulation package 5.1.73.0)
CortxA8: Breakpoint Manager: Retrying with a AET breakpoint
CortxA8: Trouble Setting Breakpoint with the Action “Finish Auto Run” at 0x800015ac: (Error -1066 @ 0x333C) Unable to set requested breakpoint in memory. Verify that the breakpoint address is in writable memory. (Emulation package 5.1.73.0)

Has anyone seem this before? Any help would be much appreciated.

Thanks

John

Hi All

My brains are fried from banging against a particularly hard software wall
and I need some help.

I have bought an XDS100v2 emulator and a Beagleboard black and soldered on
the connector. I have loaded the Starterware package and CCS5 onto my
Ubuntu 12.04LTS PC. I have rebuild all of the libraries and I am trying to
load the LED flashing example program.

I have set up the debug session according to this web page:

http://processors.wiki.ti.com/index.php/AM335X_StarterWare_Environment_Setup#Debugging_on_BeagleBone_board_using_CCSv5

However, when I launch the debugger I always get this:

CortxA8: Output: **** AM335x Beaglebone Initialization is in progress
..........

I would guess the line above points to your problem. You are using a CCS
GEL file for the original BeagleBone (white) that has different DDR than
the BeagleBone Black so the settings in this GEL file are configuring the
EMIF incorrectly. I see there is a GEL file for the BBB here:
http://processors.wiki.ti.com/index.php/File:BeagleBlack_400Mhz_4GbDDR.gel.tar.gz
.
I have not tried it (yet) as I have not added a JTAG connector to my BBB.

Mark

Initializing ddr2 while bbb has ddr3

Thanks - changing the GEL file solved it. There are a few Beaglebone Black GEL files available on the web.

Now I need to find why it is running so slow.

Thanks again

John