PRU based frequency detection and measuremnt-

kernel 3.8.x
Thanks for the effort for addressing this problem in advance.
The following assembler and python files concists of my code to measure frequencies on the respectiver ports P8_15 and P8_16 using PRU0. The only problem being the outout of one of those frequency measured is always fluctuatung by a large margin (does show the actual output sometimes). I agree with the fact that this code can handle frequency measurement at one ports flawlessly I have checked for overflow of memory assigned at the shared ram and I can confirm that the flaw in output is not due to the overflow.Any help would be appreseated.
Thank you.

The following code is assembler code I have been using-
.origin 0

#define PRU0_ARM_INTERRUPT 19

#define CONST_PRUCFG C4
#define CONST_PRUSHAREDRAM C28

#define PRU0_CTRL 0x22000
#define PRU1_CTRL 0x24000

#define CTPPR0 0x28

#define OWN_RAM 0x000
#define OTHER_RAM 0x020
#define SHARED_RAM 0x100

#define SECOND 200000000 // 2e8 5ns cycles
#define DELAY 200 // 0.01 s

START:
lbco r0, CONST_PRUCFG, 4, 4 // Enable OCP master port
clr r0, r0, 4
sbco r0, CONST_PRUCFG, 4, 4

mov r0, SHARED_RAM // Set C28 to point to shared RAM
mov r1, PRU0_CTRL + CTPPR0
sbbo r0, r1, 0, 4

mov r2.w0, DELAY & 0xFFFF
mov r2.w2, DELAY >> 16

WAITLO:
qbbc WAITLO, r31.t15

IGNORE: // Wait for 50 consecutive readings of 1
add r0, r0, 2 // 3 cycles per loop
qbgt IGNORE, r0, r2

WAIT1: // Continue counting while input is still 1
add r0, r0, 2
qbbs WAIT1, r31.t15

WAIT2: // Continue counting while input is 0
add r0, r0, 2
qbbc WAIT2, r31.t15 // End count when input goes to 1

sbco r0, CONST_PRUSHAREDRAM, 0, 4 // Write count to RAM
MOV R31.b0, PRU0_ARM_INTERRUPT+16 // Send notification to Host for program completion
mov r0,0

WAITLO1:
qbbc WAITLO1, r31.t14

IGNORE1: // Wait for 50 consecutive readings of 1
add r0, r0, 2 // 3 cycles per loop
qbgt IGNORE1, r0, r2

WAIT3: // Continue counting while input is still 1
add r0, r0, 2
qbbs WAIT3, r31.t14

WAIT4: // Continue counting while input is 0
add r0, r0, 2
qbbc WAIT4, r31.t14 // End count when input goes to 1

sbco r0, CONST_PRUSHAREDRAM,8 , 4 // Write count to RAM
MOV R31.b0, PRU0_ARM_INTERRUPT+16 // Send notification to Host for program completion
mov r0, 0
jmp IGNORE

FREQ-MSR-ASSEM.p (2.07 KB)

BI-FREQ-MSR.py (2.63 KB)

I just changed the port address and made it two saprate programs (assembly code) and called both .bin files one by one at the time of execution it worked like a dream

Do you know that the CPU has hardware modules for measuring frequencies (@ 100 MHz)?

  • 2 x CAP module in PWMSS

  • 1 x CAP module in PRU

  • 3 x QEP module in PWMSS