I’m afraid this is not really a BeagleBone question. But since PRU is not officially supported by TI, I hope someone out here is enlightened…
The PRU can access the whole global address range of the Sitara, right? But are a PRU’s memory accesses run through the MMU?
My goal is to protect given memory areas and/or peripherals from being accessed by PRU code. Is that possible?
Thanks in advance.