PRU memory/peripheral access protection with MMU


I’m afraid this is not really a BeagleBone question. But since PRU is not officially supported by TI, I hope someone out here is enlightened… :wink:
The PRU can access the whole global address range of the Sitara, right? But are a PRU’s memory accesses run through the MMU?
My goal is to protect given memory areas and/or peripherals from being accessed by PRU code. Is that possible?

Thanks in advance.



No, like a DMA controller, the PRU directly accesses physical memory. No MMU and no protection. A simple code error can crash your system, or PRU malware can capture your creditcard data :wink:

-- Bas


I believe the PRU is connected directly to the L3 interconnect, so it has direct access to the DDR memory similar to a DMA controller.


Bas, Chris,
thank you both…
That’s what I needed to know!