PRU Pin Mux

Oh… I’m barely getting by with what I’m doing much less figuring that out. I really really really would love it done or any sort of work around that would allow me to assign those pins to the PRU config-pin or not. This project is very cramped without those pins. Doable on entry level stages but very cramped.

Well it's straight-forward to craft a device tree overlay for just the
pins you need. I'll try to get the missing HDMI overlay added soon, but
no guarantees. I've got a bunch of other stuff I'm working on right now.

I understand man and no rush. Heck I may tackle it one weekend. For the time being I’ve disable the eMMC and used it’s pins for inputs and I’m using pru0 for the heavy lifting. pru1 is still just slightly better for that purpose.

What is with P9.41 and P9.42? They don’t have pruout status even though they have an assigned bit in R30? That cuts this core down to 8 outputs…

You are likely referring to P9.41.1 and P9.41.2, these are special case
pins and are accessed using P9.91 and P9.92 (add 50 to the pin number
for the second SoC pad tied to the same physical P8/P9 pin).

“You have 100% full control over anything the PRU can access.”

This pru code seems to disproves this. The PRU cannot modify the configuration registers.

// enable ocp master.
LBCO r0, C4, 4, 4
CLR r0, r0, 4
SBCO r0, C4, 4, 4

// turn on gpio
mov r1, 0x4000
mov r0, 0x44E07194
SBBO b, a, 0, 4
// readback
LBBO b, a, 0, 4

// gpio off
mov b, 0x4000
mov a, 0x44E07190
SBBO b, a, 0, 4
// readback
LBBO b, a, 0, 4

I apologize, a miss click posted that…full code below.

// enable ocp master.
LBCO r0, C4, 4, 4
CLR r0, r0, 4
SBCO r0, C4, 4, 4
// try to set gpio address
// gpio on
mov r1, 0x4000 # gpio 0, bit 14, p9.29
mov r0, 0x44E07194 # gpio 0 set register
SBBO r1, r0, 0, 4
// led on p9.26 light up here, devmem2 shows this address was set
// readback
LBBO r1, r0, 0, 4
// readback matches!
// gpio off
mov r1, 0x4000 # bit 14, p9.29
mov r0, 0x44E07190 # gpio 0 clear register
SBBO r1, r0, 0, 4
// led on p9.26 shuts off here, devmem2 shows this address was set
LBBO r1, r0, 0, 4
// readback matches

// try to set config address, P8.40
mov r1, 0x25
mov r0, 0x44E108B8
// devmem 2 says 0x44E108B8 = 0x5 (what i have it set to in dts)
SBBO r1, r0, 0, 4
// devmem 2 says 0x44E108B8 is still 0x5!
LBBO r1, r0, 0, 4
// readback doesn’t match! r1 is now 0x5!

You had me excited, even though I’d tested this before, and have read in multiple places that it’s not possible. :frowning:

–Brandon

A miss click and a miss post …

The PRUSS can access the Control Modul pin mux registers. It’s working for a lot of libpruio users. Did you enable the OCP master port?

I don’t believe the reads/writes to the GPIO registers would have worked without the OCP master being enabled.

Thanks, I’ll check out the library to see what magic is missing from that code.