Question about BB/BBB Ethernet PHY

Based on what I’ve read in this forum/list I would imagine that this is a question for Gerald…

I’ve been working on a design that has two Ethernet PHYs and I ended up using the LAN8720 but considered the LAN8710.

Is there a specific reason the BB/BBB went with the 8710 and, to the real meat of my question, is using MII instead of RMII?

It seems like RMII could free up 2-6 more pins. I haven’t done all the studying to see whether this would actually result in benefits to the end user (no more room on pin headers? mux limitations?) but I’ve been curious as to why MII was chosen so I thought I would ask.

Reviewing/studying the schematic and layout, I want to say ‘Excellent Work!’ to both the schematic designer and layout engineer. Definitely impressed with the work done. If Gerald is both the schematic designer and the layout engineer, then an additional kudos for doing both extremely well.

Thank you for your hard work getting this board out there. I am almost unable to organize all my ideas for projects with this board since I have so many ideas to prioritize.



I tried RMII in the first BeagleBone design. It had issues. It had lots of issues. And I had 90 days from start to production. So, I went MII and it worked great. I saw no reason to go back to RMII on the BeagleBone black. What we have works great.

I am working on a design with RMII. We shall see if it works. Main issue was you cannot use the clock from the processor. You have to source the clock externally from the PHY and you have to have a good layout.

As to the 8710 versus 8720, I needed the smallest package, I needed the lowest cost.



Thanks for the quick response.

I chose the 8720 due to space limitations and the need to go with RMII to reduce routing congestion. I have the PHYs back-to-back in my design so there are two different MACs and thus 4 endpoints in need of the 50MHz clock.

I went with a MEMS oscillator with a 4 way fanout buffer. So far, everything is working fine but we haven’t done any long-term or burn-in testing.

I wasn’t cost constrained so I can see how the issue of providing a clean clock with RMII could conflict with cost saving goals.


Nice! Have you done any iPERF tests on the interface?


Not yet. Our design is a mezzanine card and one PHY is talking to the processor over the mezzanine connector. It’s running vxWorks with a lot of ‘other stuff’. Unfortunately we have a limited ability to configure the MACs in that platform. The other PHY is talking to an embedded wifi router module. Again, running software/firmware we don’t control.

Once I get past all the configuration issues in the two devices I plan to run some tests to see just how robust everything is.


Good luck!



Can you pls. post the results of your RMII testing? I have a board here based on the Bone that uses RMII and I’ve never gotten it to work at 100MBps, so beware you could be heading into problems. On my next design I’m going for an exact clone of the BB Ethernet.


I should clarify a couple things - the design I’m referring to is a design for my employer and it is not using the AM335X series processor.

It is using the little brother of the SMSC LAN8710 ethernet PHY (MII/RMII capable) that is on the BeagleBone - the LAN8720 (RMII only).

I purchased the BBB for my own experiments and knowledge but I am considering a ‘beefed up’ build of the design for prototyping my employer’s next gen controller. We have struggled mightily with the platform provider’s software policies and are just about ready to use our own linux based platform for the next generation.

If I do that ‘beefed up’ build, I would make a couple mods to take a stab at the RMII (ensuring I have MII fallback) and I would increase the size of the eMMC and, if possible (though it looks pretty unlikely that it is possible) up the size of the DRAM. This project wouldn’t start until later this summer and would require me to obtain access to the Cadence tools since I only want to make small changes. So, certainly no guarantee. When I finally get around to testing our RMII interfaces I will post results here if you like but I’m not sure how relevant they would be since I’m technically not using any of the same hardware as the BBB, even though I’m sure the PHY internal design is largely the same in the 8720.

Just a couple quick questions for you that might allow me to help you a bit:

  1. Are you using the LAN8720, LAN8710, or another device?
  2. If you are using one of the SMSC devices, have you submitted the design to their LANCheck service? It’s free, and they gave me a couple of very good suggestions. They might spot something you haven’t considered.