Selecting clkout2 source

Hi,

On the beaglebone running the Angstrom distribution (current kernel from git), how do I change the clkout2 pin to use the L3 clock as a source instead of the 32.768 kHz oscillator?

Without Linux, I’d just write 0x81 to the CM_CLKOUT_CTRL register, but there seem to be data structures in place in arch/arm/mach-omap2/clock33xx_data.c that define the various clock sources, the control registers, dividers and so on and this information is entered into a global clock table.

Thus, as a result of this the clkout2_ck then shows up in /sys/kernel/debug/clock/clk_32768_cl/sysclkout_pre_ck/clkout2_ck.
However, I can not seem to find information anywhere on how to change the clock source to the l3_gclk (which is also defined in the same file, but does now show up in /sys/kernel/debug/clock).

Thanks for any hints!

Cheers,
Hermann

You must call clk_set_parent() to change the parent of the clock to any of the desired clocks from the table,

static const struct clksel sysclkout_pre_sel[] = {
  { .parent = &clk_32768_ck, .rates = div_1_0_rates },
  { .parent = &l3_gclk, .rates = div_1_1_rates },
  { .parent = &ddr_pll_clk, .rates = div_1_2_rates },
  { .parent = &per_192mhz_clk, .rates = div_1_3_rates },
  { .parent = &lcd_gclk, .rates = div_1_4_rates },
  { .parent = NULL },
};

Thanks,
Vaibhav

That was exactly what I was looking for.
Will try as soon as possible and report back.

Thanks a lot,
Hermann

Finally got it working.

I kept getting EBUSY errors even though nothing was using the CLKOUT2 output - until I found that the board-am335xevm.c file enables that clock just out of fun, so the kernel thinks somebody is using it.

Many thanks,
Hermann

Nothing happens in the kernel for fun :slight_smile:

The clkout2 clock is enabled for reason, one example I can think of is, in
case of EVM, it is required for Audio codecs.

Thanks,
Vaibhav

Hi,

could you post some example code for configuring CLKOUT2 ?
I try to change its settings, but I don’t get anything on output pin.

Best Regards
AK

W dniu czwartek, 7 czerwca 2012 17:48:56 UTC+2 użytkownik Hermann napisał:

Actually with the default angstrom firmware you should at least get a 32 kHz signal at the CLKOUT2 ouput, since it is unconditionally enabled by the board-am335xevm.c file in the clkout2_enable() function.

To configure clkout2 to (about) 100 Mhz, you could replace enable_clkout2() with the following code:

static void __init clkout2_enable(void)
{
int rc;
struct clk *sel;
struct clk *clkout2;
struct clk *l3;
long rate;

clkout2 = clk_get(NULL, “clkout2_ck”);
if (IS_ERR_OR_NULL(clkout2)) {
pr_err(“Cannot clk_get clkout2, rc=%d\n”, PTR_ERR(clkout2));
return;
}

l3 = clk_get(NULL, “l3_gclk”);
if (IS_ERR_OR_NULL(l3)) {
pr_err(“Cannot clk_get l3_gclk, rc=%d\n”, PTR_ERR(l3));
return;
}

sel = clk_get_parent(clkout2);
if (IS_ERR_OR_NULL(sel)) {
pr_err(“Cannot get parent of clkout2, rc=%d\n”, PTR_ERR(sel));
return;
}

rc = clk_set_parent(sel, l3);
if (rc < 0) {
pr_err(“Cannot set parent of clkout2 to l3_gclk, rc=%d\n”, rc);
}

rate = clk_round_rate(clkout2, 100000000);
if (rate < 0) {
pr_err(“Failed to get 100 MHz clkout2_ck rate, rc=%ld!\n”, rate);
} else {
rc = clk_set_rate(clkout2, rate);
if (rc < 0) {
pr_err(“Failed to set clkout2_ck rate, rc=%d!\n”, rc);
}
}

rc = clk_enable(clkout2);
if (rc < 0) {
pr_err(“Cannot enable clkout2, rc=%d\n”, rc);
}

setup_pin_mux(clkout2_pin_mux);
}

Cheers,
Hermann