Hi all,
The BeagleBone Green Wireless uses an ARM Cortex-A8. So it has the variance 1 and 2
https://developer.arm.com/support/security-update
There are three main variants of the exploits, as detailed by Google in their blogpost, that explain in detail the mechanisms:
Variant 1: bounds check bypass (CVE-2017-5753)
Variant 2: branch target injection (CVE-2017-5715)
Variant 3: rogue data cache load (CVE-2017-5754)
In addition, Arm has included information on a related variant to 3, noted as 3a, in the table below.
Follow the steps below to determine if there is any vulnerability for your devices and, if vulnerable, then the mitigation mechanisms.
Step 1
Check the table below to determine if you have an affected processor.
Only affected cores are listed, all other Arm cores are NOT affected.
No indicates not affected by the particular variant.
Yes indicates affected by the particular variant but has a mitigation (unless otherwise stated).
Processor | Variant 1 | variant 2 | variant 3 | variant 3a |
- | - | - | - | - |
Cortex-A8 | Yes (under review) | Yes | No | No
|
They update with more information recently with this link
For Cortex-A8, Cortex-A9, and Cortex-A15, please apply the patches available at https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=kpti
The problem is that this patch can apply only for the kernel 4.9 and after kernels, however, the BBGW only can use the kernel 4.4, because if you use a different kernel you are going to have this error message
[ 310.837199] wlcore: ERROR error getting static data
[ 310.888675] wlcore: ERROR firmware boot failed despite 3 retries
[ 317.196091] wlcore: ERROR Your WiFi FW version (8.9.0.0.17) is invalid.
[ 317.196091] Please use at least FW 8.9...58.
[ 317.196091] You can get the latest firmwares at:
[ 317.196091] git://git.ti.com/wilink8-wlan/wl18xx_fw.git
I tried to solve it with this patch for the kernel:
`
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h
index c3f1152…8142add 100644
— a/arch/arm/include/asm/cp15.h
+++ b/arch/arm/include/asm/cp15.h
@@ -49,6 +49,23 @@
#ifdef CONFIG_CPU_CP15
+#define __ACCESS_CP15(CRn, Op1, CRm, Op2) \
- “mrc”, “mcr”, __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
+#define __ACCESS_CP15_64(Op1, CRm) \ - “mrrc”, “mcrr”, __stringify(p15, Op1, %Q0, %R0, CRm), u64