I’m writing a SPI driver for the PRU on BBB.
Mux settings for pins is done by config-pin: P9.29, P9.30 and P9.31 are configured as “spi” for SPI1_D0, SPI1_D1 and SPI1_SCLK, while P8.27, P8.29 and P9.28 are configured as gpio output as 3 chip select (to be manually managed).
Chip select pin are ok but I can’t transmit/receive anything by the spi.
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The PRU code checks register CM_PER_SPI1_CLKCTRL to verify if the module is enabled (interface and functional clocks provided to).
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in case it enable the module and wait for fully functional status.
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Then MCSPI_SYSCONFIG register is set to 0x030A (clocks always present, idle requests rejected, no autoidle plus module soft reset).
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The initialization continues only when register MCSPI_SYSSTATUS confirm that reset is completed.
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follows the setting of:
MCSPI_MODULCTRL to 0x0003 (no delay before first tx, functional mode, master, SPIEN not used, SINGLE mode)
MCSPI_CH0CONF to 0x200107BC (1clk clock granularity, FIFOs non enabled, no turbo mode, Tx on SPI1_D1, Rx on SPI1_D0, 16bit word, CLKD=15, mode0)
MCSPI_CH0CTRL to 0x1E01 (EXTCLK=30, channel 0 enabled)
Initialization is done.
With EXTCLK and CLKD settings I’m expecting a 100kHz spi clock (48MHz/(CLKD + 1 + EXTCLK*16)=100kHz)
But when I write to register MCSPI_TX0, there’s no activity at all on the spi pins, while I’m expecting the transmission/reception starts just after the writing into TX0 register…
Reading MCSPI_CH0STAT give me 0x00: EOT=0 (shift register sill loaded with data), TXS=0 (TX0 register full), RXS=0 (RX0 register empty).
Am I missing something?
Gianfranco