SPI1_D0 and SPI1_D1... what's MISO, whats MOSI?

I need to find out what the Pins 29 and 30 on Pin Header P9 (SPI1_D0 and SPI1_D1) are.
Which is MISO (Master Input Slave Output) and which is MOSI (Master Output Slave Input)?
I looked for that a long time but couldn’t find it anywhere, can somebody help me? That would be great!

Nice Greetings
Thomas

That is determined by the SW. So I cannot answer you. Maybe someone on the SW side can answer as to how the SW uses the pins.

Gerald

I need to find out what the *Pins 29 and 30* on Pin *Header P9* (SPI1_D0
and SPI1_D1) are.
Which is *MISO* (Master Input Slave Output) and which is *MOSI* (Master
Output Slave Input)?
I looked for that a long time but couldn't find it anywhere, can
somebody help me? That would be great!

Nice Greetings
Thomas

Easiest way that I find is to look at the SPI DT. As you can see it shows:

spi1_pins_s0: spi1_pins_s0 {
pinctrl-single,pins = <
0x190 0x33 /* mcasp0_aclkx.spi1_sclk, INPUT_PULLUP | MODE3 */
0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
>;
};

spi1_d0 is INPUT, hence MISO, spi_d1 is output hence MOSI.

Cheers,

Thomas,

unlike most microcontrollers, the AM335x allows the MISO/MOSI pins to be software definable. one of the reasons behind this is to help with the pcb layout. when designing complex boards, sometimes it is easier to have these definable help prevent the signals having to cross during layout.

we have a wiki page that talks about setting the SPI character device driver with some examples of defining how MISO/MOSI are mapped to the D0/D1 pins:

http://elinux.org/BeagleBone_Black_Enable_SPIDEV

Dave