On the BB schematics (rev C4), there are test points for SDC_CLK (TP5)
and SDC_nCS0 (TP6), but I do not see these anywhere on the BB (I've
been able to locate all of the other test points). They are
identified on the schematic as 'TESTPT2', as opposed to all of the
other ones are listed as 'TESTPT1'. What do these designations mean?
The reason I'm asking this is that we've got a board based on the BB.
When I probe SDC_CLK, I see what looks like is kind of a 166 MHz for
the SDRAM, but that has a peak-to-peak amplitude of less than 100mV.
I'm having trouble finding the signal format for that particular
signal, so I'd like to see what it looks like on the BB.
The best thing to do is to load the Free Allegro viewer. Read in the CAD file and locate it that way.
Opening those files only confirmed my suspicion that those points
aren't labeled anywhere on the board. Do they exist?
This only confirmed that they're not labeled on the board. Do they
even exist? Again, what do the designations 'TESTPT1' and 'TESTPT2'
I will look it up for you but it may be a while.
That is the refence designator. But sometimes there isn’t enough room to print the text on the board.
There is a pad just below RP4. It is not masked. That is the SDC_CLK testpoint.
The other test point is on the back of the board inside the inner ring of the processor.It is the one with no soldermask on it. It is silver.