Where are VDD and SYS_RESETn?

Can somebody verify where the following pins/signals can be found at the PocketBeagle (comparing to BeagleBone Black):

  • VDD (to supply externel power apart from USB)
  • SYS_RESETn (signalling SiP is in reset state and no inputs are allowed to be pulled to LOW or HIGH)



Nobody an idea? While searching through the board here I find two different opinions about VDD/where to apply external power to, so some clarification would be really nice…

I have been unable to get a PocketBeagle to run for more than about 12 hours without rebooting when powered from Vin (P1-pin1), using a trusted power supply.
It usually reboots itself successfully, so in order to see it, run some commands to turn off the blinking blue lights. If they come back on by themselves, it has rebooted.
Or you can read the system logs.

It works fine when powered from Vi (P1-pin7) which is the same as the Vusb +5 Volt input/output.
It works fine when Vi and Vin are paralleled, but I am uncomfortable paralleling power supplies, unless someone who really understands them says it is OK.

The docs indicate that Vin (P1-pin1) should be the primary power input for power inputs other than battery or USB, and this input should have the highest current handling capability of the three.

So far, I find that Vin is approximately worthless.
Your mileage may vary.
So far, no reaction or comment from Jason or Robert.

If you can, or can not, duplicate my observations, please comment.

As far as a replacement for SYS_RESETn, I don’t think that the external 3V3 power appears until the system has booted, so you could use this Voltage to gate things that might upset the boot process, or break things prior to the CPU booting.
At least that is how it worked on the BBB, so I assume the same on the PocketBone.

— Graham

Hello Graham,

thanks for your feedback.

I tried running PocketBeagle from Vin/pin1 and it worked smoothly here for more than 13 hours. It was powered via 5V that came from a USB connector.

But I was running a bare metal application with no Linux involved. So may be there is a bug rather in the Linux system you are using than in the hardware?

I remember the PMIC of the BeagleBone could be accessed from software, watchdog with some illegal parameters would be a candidate too (OK, watchdog would not explain why the power pin has an influence…).

With kind regards



Thanks for the comments.

Were you using the USB0 connector on the board (which is hardwired to P1-pin7), or was it an independent off board connector?

— Graham

I soldered the power-wires of an USB-cable to P1/pin 1 and P1/pin 16. So USB was not used at all in this scenario.

Regarding SYS_RESETn: I found a signal named RESET_OUT at P2/pin 26 - could this the equivalent to SYS_RESETn? Unfortunately I have no idea how to measure if it could be it or not…