/dts-v1/; // magic: 0xd00dfeed // totalsize: 0x18306 (99078) // off_dt_struct: 0x38 // off_dt_strings: 0x16e9c // off_mem_rsvmap: 0x28 // version: 17 // last_comp_version: 16 // boot_cpuid_phys: 0x0 // size_dt_strings: 0x146a // size_dt_struct: 0x16e64 / { compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; interrupt-parent = <0x00000001>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; model = "TI AM335x BeagleBone Black"; chosen { stdout-path = "/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0"; base_dtb = "am335x-boneblack.dts"; base_dtb_timestamp = "Wed Apr 10 10:44:18 2024"; }; aliases { i2c0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0"; i2c1 = "/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0"; i2c2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0"; serial0 = "/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0"; serial1 = "/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0"; serial2 = "/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0"; serial3 = "/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0"; serial4 = "/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0"; serial5 = "/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0"; d-can0 = "/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0"; d-can1 = "/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0"; usb0 = "/ocp/target-module@47400000/usb@1400"; usb1 = "/ocp/target-module@47400000/usb@1800"; phy0 = "/ocp/target-module@47400000/usb-phy@1300"; phy1 = "/ocp/target-module@47400000/usb-phy@1b00"; ethernet0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1"; ethernet1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2"; spi0 = "/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0"; spi1 = "/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0"; mmc0 = "/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0"; mmc1 = "/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0"; mmc2 = "/ocp/target-module@47810000/mmc@0"; }; cpus { #address-cells = <0x00000001>; #size-cells = <0x00000000>; cpu@0 { compatible = "arm,cortex-a8"; enable-method = "ti,am3352"; device_type = "cpu"; reg = <0x00000000>; operating-points-v2 = <0x00000002>; clocks = <0x00000003>; clock-names = "cpu"; clock-latency = <0x000493e0>; cpu-idle-states = <0x00000004>; cpu0-supply = <0x00000005>; }; idle-states { mpu_gate { compatible = "arm,idle-state"; entry-latency-us = <0x00000028>; exit-latency-us = <0x0000005a>; min-residency-us = <0x0000012c>; ti,idle-wkup-m3; phandle = <0x00000004>; }; }; }; opp-table { compatible = "operating-points-v2-ti-cpu"; syscon = <0x00000006>; phandle = <0x00000002>; opp50-300000000 { opp-hz = <0x00000000 0x11e1a300>; opp-microvolt = <0x000e7ef0 0x000e34b8 0x000ec928>; opp-supported-hw = <0x00000006 0x00000010>; opp-suspend; }; opp100-275000000 { opp-hz = <0x00000000 0x10642ac0>; opp-microvolt = <0x0010c8e0 0x001072f0 0x00111ed0>; opp-supported-hw = <0x00000001 0x000000ff>; opp-suspend; }; opp100-300000000 { opp-hz = <0x00000000 0x11e1a300>; opp-microvolt = <0x0010c8e0 0x001072f0 0x00111ed0>; opp-supported-hw = <0x00000006 0x00000020>; opp-suspend; }; opp100-500000000 { opp-hz = <0x00000000 0x1dcd6500>; opp-microvolt = <0x0010c8e0 0x001072f0 0x00111ed0>; opp-supported-hw = <0x00000001 0x0000ffff>; }; opp100-600000000 { opp-hz = <0x00000000 0x23c34600>; opp-microvolt = <0x0010c8e0 0x001072f0 0x00111ed0>; opp-supported-hw = <0x00000006 0x00000040>; }; opp120-600000000 { opp-hz = <0x00000000 0x23c34600>; opp-microvolt = <0x00124f80 0x0011f1c0 0x0012ad40>; opp-supported-hw = <0x00000001 0x0000ffff>; }; opp120-720000000 { opp-hz = <0x00000000 0x2aea5400>; opp-microvolt = <0x00124f80 0x0011f1c0 0x0012ad40>; opp-supported-hw = <0x00000006 0x00000080>; }; oppturbo-720000000 { opp-hz = <0x00000000 0x2aea5400>; opp-microvolt = <0x001339e0 0x0012d770 0x00139c50>; opp-supported-hw = <0x00000001 0x0000ffff>; }; oppturbo-800000000 { opp-hz = <0x00000000 0x2faf0800>; opp-microvolt = <0x001339e0 0x0012d770 0x00139c50>; opp-supported-hw = <0x00000006 0x00000100>; }; oppnitro-1000000000 { opp-hz = <0x00000000 0x3b9aca00>; opp-microvolt = <0x001437c8 0x0013d044 0x00149f4c>; opp-supported-hw = <0x00000006 0x00000100>; }; }; target-module@4b000000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; clocks = <0x00000007 0x000000b8 0x00000000>; clock-names = "fck"; ti,no-idle; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x4b000000 0x01000000>; target-module@140000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; clocks = <0x00000008 0x00000000 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00140000 0x00ec0000>; pmu@0 { compatible = "arm,cortex-a8-pmu"; interrupts = <0x00000003>; }; }; }; soc { compatible = "ti,omap-infra"; }; ocp { compatible = "simple-pm-bus"; power-domains = <0x00000009>; clocks = <0x00000007 0x000000bc 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges; phandle = <0x0000006b>; interconnect@44c00000 { compatible = "ti,am33xx-l4-wkup", "simple-pm-bus"; power-domains = <0x0000000a>; clocks = <0x0000000b 0x0000000c 0x00000000>; clock-names = "fck"; reg = <0x44c00000 0x00000800 0x44c00800 0x00000800 0x44c01000 0x00000400 0x44c01400 0x00000400>; reg-names = "ap", "la", "ia0", "ia1"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x44c00000 0x00100000 0x00100000 0x44d00000 0x00100000 0x00200000 0x44e00000 0x00100000>; phandle = <0x0000006c>; segment@0 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000800 0x00000800 0x00000800 0x00000800 0x00001000 0x00001000 0x00000400 0x00001400 0x00001400 0x00000400>; }; segment@100000 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00100000 0x00004000 0x00004000 0x00104000 0x00001000 0x00080000 0x00180000 0x00002000 0x00082000 0x00182000 0x00001000>; target-module@0 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x00000000 0x00000004>; reg-names = "rev"; clocks = <0x0000000c 0x00000000 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00004000 0x00080000 0x00080000 0x00002000>; cpu@0 { compatible = "ti,am3352-wkup-m3"; reg = <0x00000000 0x00004000 0x00080000 0x00002000>; reg-names = "umem", "dmem"; resets = <0x0000000a 0x00000003>; reset-names = "rstctrl"; ti,pm-firmware = "am335x-pm-firmware.elf"; phandle = <0x00000032>; }; }; }; segment@200000 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00200000 0x00002000 0x00002000 0x00202000 0x00001000 0x00003000 0x00203000 0x00001000 0x00004000 0x00204000 0x00001000 0x00005000 0x00205000 0x00001000 0x00006000 0x00206000 0x00001000 0x00007000 0x00207000 0x00001000 0x00008000 0x00208000 0x00001000 0x00009000 0x00209000 0x00001000 0x0000a000 0x0020a000 0x00001000 0x0000b000 0x0020b000 0x00001000 0x0000c000 0x0020c000 0x00001000 0x0000d000 0x0020d000 0x00001000 0x0000f000 0x0020f000 0x00001000 0x00010000 0x00210000 0x00010000 0x00020000 0x00220000 0x00010000 0x00030000 0x00230000 0x00001000 0x00031000 0x00231000 0x00001000 0x00032000 0x00232000 0x00001000 0x00033000 0x00233000 0x00001000 0x00034000 0x00234000 0x00001000 0x00035000 0x00235000 0x00001000 0x00036000 0x00236000 0x00001000 0x00037000 0x00237000 0x00001000 0x00038000 0x00238000 0x00001000 0x00039000 0x00239000 0x00001000 0x0003a000 0x0023a000 0x00001000 0x0003e000 0x0023e000 0x00001000 0x0003f000 0x0023f000 0x00001000 0x0000e000 0x0020e000 0x00001000 0x00040000 0x00240000 0x00040000 0x00080000 0x00280000 0x00001000>; target-module@0 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x00000000 0x00000004>; reg-names = "rev"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00002000>; prcm@0 { compatible = "ti,am3-prcm", "simple-bus"; reg = <0x00000000 0x00002000>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00002000>; phandle = <0x0000006d>; clocks { #address-cells = <0x00000001>; #size-cells = <0x00000000>; phandle = <0x0000006e>; clock-clk-32768 { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-output-names = "clk_32768_ck"; clock-frequency = <0x00008000>; phandle = <0x0000001c>; }; clock-clk-rc32k { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-output-names = "clk_rc32k_ck"; clock-frequency = <0x00007d00>; phandle = <0x0000001b>; }; clock-virt-19200000 { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-output-names = "virt_19200000_ck"; clock-frequency = <0x0124f800>; phandle = <0x0000002d>; }; clock-virt-24000000 { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-output-names = "virt_24000000_ck"; clock-frequency = <0x016e3600>; phandle = <0x0000002e>; }; clock-virt-25000000 { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-output-names = "virt_25000000_ck"; clock-frequency = <0x017d7840>; phandle = <0x0000002f>; }; clock-virt-26000000 { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-output-names = "virt_26000000_ck"; clock-frequency = <0x018cba80>; phandle = <0x00000030>; }; clock-tclkin { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-output-names = "tclkin_ck"; clock-frequency = <0x00b71b00>; phandle = <0x0000001a>; }; clock@490 { #clock-cells = <0x00000000>; compatible = "ti,am3-dpll-core-clock"; clock-output-names = "dpll_core_ck"; clocks = <0x0000000d 0x0000000d>; reg = <0x00000490 0x0000045c 0x00000468 0x00000460 0x00000464>; phandle = <0x0000000e>; }; clock-dpll-core-x2 { #clock-cells = <0x00000000>; compatible = "ti,am3-dpll-x2-clock"; clock-output-names = "dpll_core_x2_ck"; clocks = <0x0000000e>; phandle = <0x0000000f>; }; clock-dpll-core-m4@480 { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "dpll_core_m4_ck"; clocks = <0x0000000f>; ti,max-div = <0x0000001f>; reg = <0x00000480>; ti,index-starts-at-one; phandle = <0x00000016>; }; clock-dpll-core-m5@484 { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "dpll_core_m5_ck"; clocks = <0x0000000f>; ti,max-div = <0x0000001f>; reg = <0x00000484>; ti,index-starts-at-one; phandle = <0x0000001e>; }; clock-dpll-core-m6@4d8 { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "dpll_core_m6_ck"; clocks = <0x0000000f>; ti,max-div = <0x0000001f>; reg = <0x000004d8>; ti,index-starts-at-one; phandle = <0x0000006f>; }; clock@488 { #clock-cells = <0x00000000>; compatible = "ti,am3-dpll-clock"; clock-output-names = "dpll_mpu_ck"; clocks = <0x0000000d 0x0000000d>; reg = <0x00000488 0x00000420 0x0000042c 0x00000424 0x00000428>; phandle = <0x00000003>; }; clock-dpll-mpu-m2@4a8 { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "dpll_mpu_m2_ck"; clocks = <0x00000003>; ti,max-div = <0x0000001f>; reg = <0x000004a8>; ti,index-starts-at-one; phandle = <0x00000070>; }; clock@494 { #clock-cells = <0x00000000>; compatible = "ti,am3-dpll-no-gate-clock"; clock-output-names = "dpll_ddr_ck"; clocks = <0x0000000d 0x0000000d>; reg = <0x00000494 0x00000434 0x00000440 0x00000438 0x0000043c>; phandle = <0x00000010>; }; clock-dpll-ddr-m2@4a0 { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "dpll_ddr_m2_ck"; clocks = <0x00000010>; ti,max-div = <0x0000001f>; reg = <0x000004a0>; ti,index-starts-at-one; phandle = <0x00000011>; }; clock-dpll-ddr-m2-div2 { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "dpll_ddr_m2_div2_ck"; clocks = <0x00000011>; clock-mult = <0x00000001>; clock-div = <0x00000002>; phandle = <0x00000071>; }; clock@498 { #clock-cells = <0x00000000>; compatible = "ti,am3-dpll-no-gate-clock"; clock-output-names = "dpll_disp_ck"; clocks = <0x0000000d 0x0000000d>; reg = <0x00000498 0x00000448 0x00000454 0x0000044c 0x00000450>; phandle = <0x00000012>; }; clock-dpll-disp-m2@4a4 { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "dpll_disp_m2_ck"; clocks = <0x00000012>; ti,max-div = <0x0000001f>; reg = <0x000004a4>; ti,index-starts-at-one; ti,set-rate-parent; phandle = <0x00000018>; }; clock@48c { #clock-cells = <0x00000000>; compatible = "ti,am3-dpll-no-gate-j-type-clock"; clock-output-names = "dpll_per_ck"; clocks = <0x0000000d 0x0000000d>; reg = <0x0000048c 0x00000470 0x0000049c 0x00000474 0x00000478>; phandle = <0x00000013>; }; clock-dpll-per-m2@4ac { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "dpll_per_m2_ck"; clocks = <0x00000013>; ti,max-div = <0x0000001f>; reg = <0x000004ac>; ti,index-starts-at-one; phandle = <0x00000014>; }; clock-dpll-per-m2-div4-wkupdm { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "dpll_per_m2_div4_wkupdm_ck"; clocks = <0x00000014>; clock-mult = <0x00000001>; clock-div = <0x00000004>; phandle = <0x00000072>; }; clock-dpll-per-m2-div4 { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "dpll_per_m2_div4_ck"; clocks = <0x00000014>; clock-mult = <0x00000001>; clock-div = <0x00000004>; phandle = <0x00000073>; }; clock-clk-24mhz { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "clk_24mhz"; clocks = <0x00000014>; clock-mult = <0x00000001>; clock-div = <0x00000008>; phandle = <0x00000015>; }; clock-clkdiv32k { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "clkdiv32k_ck"; clocks = <0x00000015>; clock-mult = <0x00000001>; clock-div = <0x000002dc>; phandle = <0x00000074>; }; clock-l3-gclk { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "l3_gclk"; clocks = <0x00000016>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x00000017>; }; clock-pruss-ocp-gclk@530 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "pruss_ocp_gclk"; clocks = <0x00000017 0x00000018>; reg = <0x00000530>; phandle = <0x00000059>; }; clock-mmu-fck-1@914 { #clock-cells = <0x00000000>; compatible = "ti,gate-clock"; clock-output-names = "mmu_fck"; clocks = <0x00000016>; ti,bit-shift = <0x00000001>; reg = <0x00000914>; phandle = <0x00000075>; }; clock-timer1-fck@528 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "timer1_fck"; clocks = <0x0000000d 0x00000019 0x00000000 0x00000000 0x0000001a 0x0000001b 0x0000001c>; reg = <0x00000528>; phandle = <0x00000035>; }; clock-timer2-fck@508 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "timer2_fck"; clocks = <0x0000001a 0x0000000d 0x00000019 0x00000000 0x00000000>; reg = <0x00000508>; phandle = <0x0000003b>; }; clock-timer3-fck@50c { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "timer3_fck"; clocks = <0x0000001a 0x0000000d 0x00000019 0x00000000 0x00000000>; reg = <0x0000050c>; phandle = <0x00000076>; }; clock-timer4-fck@510 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "timer4_fck"; clocks = <0x0000001a 0x0000000d 0x00000019 0x00000000 0x00000000>; reg = <0x00000510>; phandle = <0x00000077>; }; clock-timer5-fck@518 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "timer5_fck"; clocks = <0x0000001a 0x0000000d 0x00000019 0x00000000 0x00000000>; reg = <0x00000518>; phandle = <0x00000078>; }; clock-timer6-fck@51c { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "timer6_fck"; clocks = <0x0000001a 0x0000000d 0x00000019 0x00000000 0x00000000>; reg = <0x0000051c>; phandle = <0x00000079>; }; clock-timer7-fck@504 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "timer7_fck"; clocks = <0x0000001a 0x0000000d 0x00000019 0x00000000 0x00000000>; reg = <0x00000504>; phandle = <0x0000007a>; }; clock-usbotg-fck-8@47c { #clock-cells = <0x00000000>; compatible = "ti,gate-clock"; clock-output-names = "usbotg_fck"; clocks = <0x00000013>; ti,bit-shift = <0x00000008>; reg = <0x0000047c>; phandle = <0x0000007b>; }; clock-dpll-core-m4-div2 { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "dpll_core_m4_div2_ck"; clocks = <0x00000016>; clock-mult = <0x00000001>; clock-div = <0x00000002>; phandle = <0x0000001d>; }; clock-ieee5000-fck-1@e4 { #clock-cells = <0x00000000>; compatible = "ti,gate-clock"; clock-output-names = "ieee5000_fck"; clocks = <0x0000001d>; ti,bit-shift = <0x00000001>; reg = <0x000000e4>; phandle = <0x0000007c>; }; clock-wdt1-fck@538 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "wdt1_fck"; clocks = <0x0000001b 0x00000019 0x00000000 0x00000000>; reg = <0x00000538>; phandle = <0x0000007d>; }; clock-l4-rtc-gclk { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "l4_rtc_gclk"; clocks = <0x00000016>; clock-mult = <0x00000001>; clock-div = <0x00000002>; phandle = <0x0000007e>; }; clock-l4hs-gclk { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "l4hs_gclk"; clocks = <0x00000016>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x0000007f>; }; clock-l3s-gclk { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "l3s_gclk"; clocks = <0x0000001d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x00000080>; }; clock-l4fw-gclk { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "l4fw_gclk"; clocks = <0x0000001d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x00000081>; }; clock-l4ls-gclk { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "l4ls_gclk"; clocks = <0x0000001d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x00000031>; }; clock-sysclk-div { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "sysclk_div_ck"; clocks = <0x00000016>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x00000082>; }; clock-cpsw-125mhz-gclk { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "cpsw_125mhz_gclk"; clocks = <0x0000001e>; clock-mult = <0x00000001>; clock-div = <0x00000002>; phandle = <0x00000050>; }; clock-cpsw-cpts-rft@520 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "cpsw_cpts_rft_clk"; clocks = <0x0000001e 0x00000016>; reg = <0x00000520>; phandle = <0x00000051>; }; clock-gpio0-dbclk-mux@53c { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "gpio0_dbclk_mux_ck"; clocks = <0x0000001b 0x0000001c 0x00000019 0x00000000 0x00000000>; reg = <0x0000053c>; phandle = <0x00000083>; }; clock-lcd-gclk@534 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "lcd_gclk"; clocks = <0x00000018 0x0000001e 0x00000014>; reg = <0x00000534>; ti,set-rate-parent; phandle = <0x00000020>; }; clock-mmc { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "mmc_clk"; clocks = <0x00000014>; clock-mult = <0x00000001>; clock-div = <0x00000002>; phandle = <0x00000084>; }; clock@52c { compatible = "ti,clksel"; reg = <0x0000052c>; #clock-cells = <0x00000002>; #address-cells = <0x00000000>; clock-gfx-fclk-clksel { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "gfx_fclk_clksel_ck"; clocks = <0x00000016 0x00000014>; ti,bit-shift = <0x00000001>; phandle = <0x0000001f>; }; clock-gfx-fck-div { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "gfx_fck_div_ck"; clocks = <0x0000001f>; ti,max-div = <0x00000002>; phandle = <0x00000085>; }; }; clock@700 { compatible = "ti,clksel"; reg = <0x00000700>; #clock-cells = <0x00000002>; #address-cells = <0x00000000>; clock-sysclkout-pre { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "sysclkout_pre_ck"; clocks = <0x0000001c 0x00000017 0x00000011 0x00000014 0x00000020>; phandle = <0x00000021>; }; clock-clkout2-div { #clock-cells = <0x00000000>; compatible = "ti,divider-clock"; clock-output-names = "clkout2_div_ck"; clocks = <0x00000021>; ti,bit-shift = <0x00000003>; ti,max-div = <0x00000008>; phandle = <0x00000022>; }; clock-clkout2 { #clock-cells = <0x00000000>; compatible = "ti,gate-clock"; clock-output-names = "clkout2_ck"; clocks = <0x00000022>; ti,bit-shift = <0x00000007>; phandle = <0x00000086>; }; }; }; clockdomains { phandle = <0x00000087>; }; clock@0 { compatible = "ti,omap4-cm"; clock-output-names = "per_cm"; reg = <0x00000000 0x00000400>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000400>; phandle = <0x00000088>; clock@38 { compatible = "ti,clkctrl"; clock-output-names = "l4ls_clkctrl"; reg = <0x00000038 0x0000002c 0x0000006c 0x00000028 0x000000ac 0x0000000c 0x000000c0 0x0000001c 0x000000ec 0x0000000c 0x0000010c 0x00000008 0x00000130 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x00000038>; }; clock@1c { compatible = "ti,clkctrl"; clock-output-names = "l3s_clkctrl"; reg = <0x0000001c 0x00000004 0x00000030 0x00000008 0x00000068 0x00000004 0x000000f8 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x00000039>; }; clock@24 { compatible = "ti,clkctrl"; clock-output-names = "l3_clkctrl"; reg = <0x00000024 0x0000000c 0x00000094 0x00000010 0x000000bc 0x00000004 0x000000dc 0x00000008 0x000000fc 0x00000008>; #clock-cells = <0x00000002>; phandle = <0x00000007>; }; clock@120 { compatible = "ti,clkctrl"; clock-output-names = "l4hs_clkctrl"; reg = <0x00000120 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x0000004e>; }; clock@e8 { compatible = "ti,clkctrl"; clock-output-names = "pruss_ocp_clkctrl"; reg = <0x000000e8 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x00000058>; }; clock@0 { compatible = "ti,clkctrl"; clock-output-names = "cpsw_125mhz_clkctrl"; reg = <0x00000000 0x00000018>; #clock-cells = <0x00000002>; phandle = <0x0000004f>; }; clock@18 { compatible = "ti,clkctrl"; clock-output-names = "lcdc_clkctrl"; reg = <0x00000018 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x0000004c>; }; clock@14c { compatible = "ti,clkctrl"; clock-output-names = "clk_24mhz_clkctrl"; reg = <0x0000014c 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x00000019>; }; }; clock@400 { compatible = "ti,omap4-cm"; clock-output-names = "wkup_cm"; reg = <0x00000400 0x00000100>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000400 0x00000100>; phandle = <0x00000089>; clock@0 { compatible = "ti,clkctrl"; clock-output-names = "l4_wkup_clkctrl"; reg = <0x00000000 0x00000010 0x000000b4 0x00000024>; #clock-cells = <0x00000002>; phandle = <0x0000000b>; }; clock@14 { compatible = "ti,clkctrl"; clock-output-names = "l3_aon_clkctrl"; reg = <0x00000014 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x00000008>; }; clock@b0 { compatible = "ti,clkctrl"; clock-output-names = "l4_wkup_aon_clkctrl"; reg = <0x000000b0 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x0000000c>; }; }; clock@600 { compatible = "ti,omap4-cm"; clock-output-names = "mpu_cm"; reg = <0x00000600 0x00000100>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000600 0x00000100>; phandle = <0x0000008a>; clock@0 { compatible = "ti,clkctrl"; clock-output-names = "mpu_clkctrl"; reg = <0x00000000 0x00000008>; #clock-cells = <0x00000002>; phandle = <0x00000046>; }; }; clock@800 { compatible = "ti,omap4-cm"; clock-output-names = "l4_rtc_cm"; reg = <0x00000800 0x00000100>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000800 0x00000100>; phandle = <0x0000008b>; clock@0 { compatible = "ti,clkctrl"; clock-output-names = "l4_rtc_clkctrl"; reg = <0x00000000 0x00000004>; #clock-cells = <0x00000002>; phandle = <0x00000037>; }; }; clock@900 { compatible = "ti,omap4-cm"; clock-output-names = "gfx_l3_cm"; reg = <0x00000900 0x00000100>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000900 0x00000100>; phandle = <0x0000008c>; clock@0 { compatible = "ti,clkctrl"; clock-output-names = "gfx_l3_clkctrl"; reg = <0x00000000 0x00000008>; #clock-cells = <0x00000002>; phandle = <0x00000063>; }; }; clock@a00 { compatible = "ti,omap4-cm"; clock-output-names = "l4_cefuse_cm"; reg = <0x00000a00 0x00000100>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000a00 0x00000100>; phandle = <0x0000008d>; clock@0 { compatible = "ti,clkctrl"; clock-output-names = "l4_cefuse_clkctrl"; reg = <0x00000000 0x00000024>; #clock-cells = <0x00000002>; phandle = <0x0000008e>; }; }; prm@c00 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x00000c00 0x00000100>; #reset-cells = <0x00000001>; #power-domain-cells = <0x00000000>; phandle = <0x00000009>; }; prm@d00 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x00000d00 0x00000100>; #reset-cells = <0x00000001>; #power-domain-cells = <0x00000000>; phandle = <0x0000000a>; }; prm@e00 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x00000e00 0x00000100>; #power-domain-cells = <0x00000000>; phandle = <0x00000045>; }; prm@f00 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x00000f00 0x00000100>; #reset-cells = <0x00000001>; phandle = <0x0000008f>; }; prm@1000 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x00001000 0x00000100>; #power-domain-cells = <0x00000000>; phandle = <0x00000036>; }; prm@1100 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x00001100 0x00000100>; #power-domain-cells = <0x00000000>; #reset-cells = <0x00000001>; phandle = <0x00000064>; }; prm@1200 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x00001200 0x00000100>; #power-domain-cells = <0x00000000>; phandle = <0x00000090>; }; }; }; target-module@3000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00003000 0x00001000>; }; target-module@5000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00005000 0x00001000>; }; target-module@7000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00007000 0x00000004 0x00007010 0x00000004 0x00007114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x0000000b 0x00000008 0x00000000 0x0000000b 0x00000008 0x00000012>; clock-names = "fck", "dbclk"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00007000 0x00001000>; phandle = <0x00000091>; gpio@0 { compatible = "ti,omap4-gpio"; gpio-ranges = <0x00000023 0x00000000 0x00000052 0x00000008 0x00000023 0x00000008 0x00000034 0x00000004 0x00000023 0x0000000c 0x0000005e 0x00000004 0x00000023 0x00000010 0x00000047 0x00000002 0x00000023 0x00000012 0x00000087 0x00000001 0x00000023 0x00000013 0x0000006c 0x00000002 0x00000023 0x00000015 0x00000049 0x00000001 0x00000023 0x00000016 0x00000008 0x00000002 0x00000023 0x0000001a 0x0000000a 0x00000002 0x00000023 0x0000001c 0x0000004a 0x00000001 0x00000023 0x0000001d 0x00000051 0x00000001 0x00000023 0x0000001e 0x0000001c 0x00000002>; gpio-controller; #gpio-cells = <0x00000002>; interrupt-controller; #interrupt-cells = <0x00000002>; reg = <0x00000000 0x00001000>; interrupts = <0x00000060>; gpio-line-names = "[mdio_data]", "[mdio_clk]", "P9_22 [spi0_sclk]", "P9_21 [spi0_d0]", "P9_18 [spi0_d1]", "P9_17 [spi0_cs0]", "[mmc0_cd]", "P9_42A [ecappwm0]", "P8_35 [lcd d12]", "P8_33 [lcd d13]", "P8_31 [lcd d14]", "P8_32 [lcd d15]", "P9_20 [i2c2_sda]", "P9_19 [i2c2_scl]", "P9_26 [uart1_rxd]", "P9_24 [uart1_txd]", "[rmii1_txd3]", "[rmii1_txd2]", "[usb0_drvvbus]", "[hdmi cec]", "P9_41B", "[rmii1_txd1]", "P8_19 [ehrpwm2a]", "P8_13 [ehrpwm2b]", "NC", "NC", "P8_14", "P8_17", "[rmii1_txd0]", "[rmii1_refclk]", "P9_11 [uart4_rxd]", "P9_13 [uart4_txd]"; phandle = <0x0000003d>; }; }; target-module@9000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00009050 0x00000004 0x00009054 0x00000004 0x00009058 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x0000000b 0x000000b4 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00009000 0x00001000>; serial@0 { compatible = "ti,am3352-uart", "ti,omap3-uart"; clock-frequency = <0x02dc6c00>; reg = <0x00000000 0x00001000>; interrupts = <0x00000048>; status = "okay"; dmas = <0x00000024 0x0000001a 0x00000000 0x00000024 0x0000001b 0x00000000>; dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <0x00000025>; symlink = "bone/uart/0"; phandle = <0x00000092>; }; }; target-module@b000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x0000b000 0x00000008 0x0000b010 0x00000008 0x0000b090 0x00000008>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000307>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x0000000b 0x000000b8 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0000b000 0x00001000>; i2c@0 { compatible = "ti,omap4-i2c"; #address-cells = <0x00000001>; #size-cells = <0x00000000>; reg = <0x00000000 0x00001000>; interrupts = <0x00000046>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x00000026>; clock-frequency = <0x00061a80>; symlink = "bone/i2c/0"; phandle = <0x00000093>; tps@24 { reg = <0x00000024>; compatible = "ti,tps65217"; interrupt-controller; #interrupt-cells = <0x00000001>; interrupts = <0x00000007>; interrupt-parent = <0x00000001>; ti,pmic-shutdown-controller; phandle = <0x00000061>; charger { compatible = "ti,tps65217-charger"; interrupts = <0x00000000 0x00000001>; interrupt-names = "USB", "AC"; status = "okay"; }; pwrbutton { compatible = "ti,tps65217-pwrbutton"; interrupts = <0x00000002>; status = "okay"; }; regulators { #address-cells = <0x00000001>; #size-cells = <0x00000000>; regulator@0 { reg = <0x00000000>; regulator-compatible = "dcdc1"; regulator-name = "vdds_dpr"; regulator-always-on; phandle = <0x00000094>; }; regulator@1 { reg = <0x00000001>; regulator-compatible = "dcdc2"; regulator-name = "vdd_mpu"; regulator-min-microvolt = <0x000e1d48>; regulator-max-microvolt = <0x00149f4c>; regulator-boot-on; regulator-always-on; phandle = <0x00000005>; }; regulator@2 { reg = <0x00000002>; regulator-compatible = "dcdc3"; regulator-name = "vdd_core"; regulator-min-microvolt = <0x000e1d48>; regulator-max-microvolt = <0x00118c30>; regulator-boot-on; regulator-always-on; phandle = <0x00000095>; }; regulator@3 { reg = <0x00000003>; regulator-compatible = "ldo1"; regulator-name = "vio,vrtc,vdds"; regulator-always-on; phandle = <0x00000096>; }; regulator@4 { reg = <0x00000004>; regulator-compatible = "ldo2"; regulator-name = "vdd_3v3aux"; regulator-always-on; phandle = <0x00000097>; }; regulator@5 { reg = <0x00000005>; regulator-compatible = "ldo3"; regulator-name = "vdd_1v8"; regulator-always-on; regulator-min-microvolt = <0x001b7740>; regulator-max-microvolt = <0x001b7740>; phandle = <0x00000098>; }; regulator@6 { reg = <0x00000006>; regulator-compatible = "ldo4"; regulator-name = "vdd_3v3a"; regulator-always-on; phandle = <0x00000027>; }; }; }; baseboard_eeprom@50 { compatible = "atmel,24c256"; reg = <0x00000050>; vcc-supply = <0x00000027>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; phandle = <0x00000099>; baseboard_data@0 { reg = <0x00000000 0x00000100>; phandle = <0x0000009a>; }; }; tda19988@70 { compatible = "nxp,tda998x"; reg = <0x00000070>; nxp,calib-gpios = <0x00000028 0x00000019 0x00000000>; interrupts-extended = <0x00000028 0x00000019 0x00000008>; pinctrl-names = "default", "off"; pinctrl-0 = <0x00000029>; pinctrl-1 = <0x0000002a>; #sound-dai-cells = <0x00000000>; audio-ports = <0x00000002 0x00000003>; phandle = <0x0000006a>; ports { #address-cells = <0x00000001>; #size-cells = <0x00000000>; port@0 { reg = <0x00000000>; endpoint { remote-endpoint = <0x0000002b>; phandle = <0x0000004d>; }; }; }; }; }; }; target-module@d000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x0000d000 0x00000004 0x0000d010 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x0000000b 0x000000bc 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0000d000 0x00001000 0x00001000 0x0000e000 0x00001000>; tscadc@0 { compatible = "ti,am3359-tscadc"; reg = <0x00000000 0x00001000>; interrupts = <0x00000010>; clocks = <0x0000002c>; clock-names = "fck"; status = "disabled"; dmas = <0x00000024 0x00000035 0x00000000 0x00000024 0x00000039 0x00000000>; dma-names = "fifo0", "fifo1"; phandle = <0x0000009b>; tsc { compatible = "ti,am3359-tsc"; }; adc { #io-channel-cells = <0x00000001>; compatible = "ti,am3359-adc"; ti,adc-channels = <0x00000000 0x00000001 0x00000002 0x00000003 0x00000004 0x00000005 0x00000006 0x00000007>; ti,chan-step-avg = <0x00000010 0x00000010 0x00000010 0x00000010 0x00000010 0x00000010 0x00000010 0x00000010>; ti,chan-step-opendelay = <0x00000098 0x00000098 0x00000098 0x00000098 0x00000098 0x00000098 0x00000098 0x00000098>; ti,chan-step-sampledelay = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>; phandle = <0x0000009c>; }; }; }; target-module@10000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x00010000 0x00000004>; reg-names = "rev"; clocks = <0x0000000b 0x00000004 0x00000000>; clock-names = "fck"; ti,no-idle; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00010000 0x00010000 0x00010000 0x00020000 0x00010000>; scm@0 { compatible = "ti,am3-scm", "simple-bus"; reg = <0x00000000 0x00002000>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; #pinctrl-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00002000>; phandle = <0x0000009d>; pinmux@800 { compatible = "pinctrl-single"; reg = <0x00000800 0x00000238>; #pinctrl-cells = <0x00000001>; pinctrl-single,register-width = <0x00000020>; pinctrl-single,function-mask = <0x0000007f>; phandle = <0x00000023>; pinmux_comms_can_pins { pinctrl-single,pins = <0x00000184 0x00000032 0x00000180 0x00000012>; phandle = <0x00000043>; }; pinmux_comms_rs485_pins { pinctrl-single,pins = <0x00000074 0x0000000e 0x00000070 0x0000002e>; phandle = <0x00000040>; }; user-leds-s0-pins { pinctrl-single,pins = <0x00000054 0x00000007 0x00000058 0x00000017 0x0000005c 0x00000007 0x00000060 0x00000017>; phandle = <0x00000065>; }; i2c0-pins { pinctrl-single,pins = <0x00000188 0x00000030 0x0000018c 0x00000030>; phandle = <0x00000026>; }; i2c2-pins { pinctrl-single,pins = <0x00000178 0x00000033 0x0000017c 0x00000033>; phandle = <0x0000003f>; }; uart0-pins { pinctrl-single,pins = <0x00000170 0x00000030 0x00000174 0x00000000>; phandle = <0x00000025>; }; cpsw-default-pins { pinctrl-single,pins = <0x00000110 0x00000030 0x00000114 0x00000000 0x00000118 0x00000030 0x0000011c 0x00000000 0x00000120 0x00000000 0x00000124 0x00000000 0x00000128 0x00000000 0x0000012c 0x00000030 0x00000130 0x00000030 0x00000134 0x00000030 0x00000138 0x00000030 0x0000013c 0x00000030 0x00000140 0x00000030>; phandle = <0x00000053>; }; cpsw-sleep-pins { pinctrl-single,pins = <0x00000110 0x00000027 0x00000114 0x00000027 0x00000118 0x00000027 0x0000011c 0x00000027 0x00000120 0x00000027 0x00000124 0x00000027 0x00000128 0x00000027 0x0000012c 0x00000027 0x00000130 0x00000027 0x00000134 0x00000027 0x00000138 0x00000027 0x0000013c 0x00000027 0x00000140 0x00000027>; phandle = <0x00000054>; }; davinci-mdio-default-pins { pinctrl-single,pins = <0x00000148 0x00000030 0x0000014c 0x00000010 0x00000168 0x00000017>; phandle = <0x00000056>; }; davinci-mdio-sleep-pins { pinctrl-single,pins = <0x00000148 0x00000027 0x0000014c 0x00000027 0x00000168 0x00000027>; phandle = <0x00000057>; }; mmc1-pins { pinctrl-single,pins = <0x00000160 0x0000002f 0x000000fc 0x00000030 0x000000f8 0x00000030 0x000000f4 0x00000030 0x000000f0 0x00000030 0x00000104 0x00000030 0x00000100 0x00000030>; phandle = <0x0000003c>; }; emmc-pins { pinctrl-single,pins = <0x00000080 0x00000032 0x00000084 0x00000032 0x00000000 0x00000031 0x00000004 0x00000031 0x00000008 0x00000031 0x0000000c 0x00000031 0x00000010 0x00000031 0x00000014 0x00000031 0x00000018 0x00000031 0x0000001c 0x00000031>; phandle = <0x00000044>; }; nxp-hdmi-bonelt-pins { pinctrl-single,pins = <0x000001b0 0x00000003 0x000000a0 0x00000008 0x000000a4 0x00000008 0x000000a8 0x00000008 0x000000ac 0x00000008 0x000000b0 0x00000008 0x000000b4 0x00000008 0x000000b8 0x00000008 0x000000bc 0x00000008 0x000000c0 0x00000008 0x000000c4 0x00000008 0x000000c8 0x00000008 0x000000cc 0x00000008 0x000000d0 0x00000008 0x000000d4 0x00000008 0x000000d8 0x00000008 0x000000dc 0x00000008 0x000000e0 0x00000000 0x000000e4 0x00000000 0x000000e8 0x00000000 0x000000ec 0x00000000>; phandle = <0x00000029>; }; nxp-hdmi-bonelt-off-pins { pinctrl-single,pins = <0x000001b0 0x00000003>; phandle = <0x0000002a>; }; mcasp0-pins { pinctrl-single,pins = <0x000001ac 0x00000030 0x0000019c 0x00000002 0x00000194 0x00000010 0x00000190 0x00000000 0x0000006c 0x00000007>; phandle = <0x0000003a>; }; }; scm_conf@0 { compatible = "syscon", "simple-bus"; reg = <0x00000000 0x00000800>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000800>; phandle = <0x00000006>; phy-gmii-sel { compatible = "ti,am3352-phy-gmii-sel"; reg = <0x00000650 0x00000004>; #phy-cells = <0x00000002>; phandle = <0x00000052>; }; clocks { #address-cells = <0x00000001>; #size-cells = <0x00000000>; phandle = <0x0000009e>; clock-sys-clkin-22@40 { #clock-cells = <0x00000000>; compatible = "ti,mux-clock"; clock-output-names = "sys_clkin_ck"; clocks = <0x0000002d 0x0000002e 0x0000002f 0x00000030>; ti,bit-shift = <0x00000016>; reg = <0x00000040>; phandle = <0x0000000d>; }; clock-adc-tsc-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "adc_tsc_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x0000002c>; }; clock-dcan0-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "dcan0_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x00000041>; }; clock-dcan1-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "dcan1_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x00000042>; }; clock-mcasp0-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "mcasp0_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x0000009f>; }; clock-mcasp1-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "mcasp1_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x000000a0>; }; clock-smartreflex0-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "smartreflex0_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x000000a1>; }; clock-smartreflex1-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "smartreflex1_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x000000a2>; }; clock-sha0-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "sha0_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x000000a3>; }; clock-aes0-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "aes0_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x000000a4>; }; clock-rng-fck { #clock-cells = <0x00000000>; compatible = "fixed-factor-clock"; clock-output-names = "rng_fck"; clocks = <0x0000000d>; clock-mult = <0x00000001>; clock-div = <0x00000001>; phandle = <0x000000a5>; }; clock@664 { compatible = "ti,clksel"; reg = <0x00000664>; #clock-cells = <0x00000002>; #address-cells = <0x00000000>; clock-ehrpwm0-tbclk { #clock-cells = <0x00000000>; compatible = "ti,gate-clock"; clock-output-names = "ehrpwm0_tbclk"; clocks = <0x00000031>; ti,bit-shift = <0x00000000>; phandle = <0x00000049>; }; clock-ehrpwm1-tbclk { #clock-cells = <0x00000000>; compatible = "ti,gate-clock"; clock-output-names = "ehrpwm1_tbclk"; clocks = <0x00000031>; ti,bit-shift = <0x00000001>; phandle = <0x0000004a>; }; clock-ehrpwm2-tbclk { #clock-cells = <0x00000000>; compatible = "ti,gate-clock"; clock-output-names = "ehrpwm2_tbclk"; clocks = <0x00000031>; ti,bit-shift = <0x00000002>; phandle = <0x0000004b>; }; }; }; }; control@620 { compatible = "ti,am335x-usb-ctrl-module"; reg = <0x00000620 0x00000010 0x00000648 0x00000004>; reg-names = "phy_ctrl", "wakeup"; phandle = <0x0000005e>; }; wkup_m3_ipc@1324 { compatible = "ti,am3352-wkup-m3-ipc"; reg = <0x00001324 0x00000024>; interrupts = <0x0000004e>; ti,rproc = <0x00000032>; mboxes = <0x00000033 0x00000034>; firmware-name = "am335x-bone-scale-data.bin"; phandle = <0x000000a6>; }; dma-router@f90 { compatible = "ti,am335x-edma-crossbar"; reg = <0x00000f90 0x00000040>; #dma-cells = <0x00000003>; dma-requests = <0x00000020>; dma-masters = <0x00000024>; phandle = <0x000000a7>; }; clockdomains { phandle = <0x000000a8>; }; }; }; target-module@31000 { compatible = "ti,sysc-omap2-timer", "ti,sysc"; reg = <0x00031000 0x00000004 0x00031010 0x00000004 0x00031014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000303>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x0000000b 0x000000c4 0x00000000 0x0000000b 0x0000000c 0x00000000>; clock-names = "fck", "ick"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00031000 0x00001000>; ti,no-reset-on-init; ti,no-idle; phandle = <0x000000a9>; timer@0 { compatible = "ti,am335x-timer-1ms"; reg = <0x00000000 0x00000400>; interrupts = <0x00000043>; ti,timer-alwon; clocks = <0x00000035>; clock-names = "fck"; assigned-clocks = <0x00000035>; assigned-clock-parents = <0x0000000d>; phandle = <0x000000aa>; }; }; target-module@33000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00033000 0x00001000>; }; target-module@35000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00035000 0x00000004 0x00035010 0x00000004 0x00035014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000022>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x0000000b 0x000000d4 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00035000 0x00001000>; wdt@0 { compatible = "ti,omap3-wdt"; reg = <0x00000000 0x00001000>; interrupts = <0x0000005b>; phandle = <0x000000ab>; }; }; target-module@37000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00037000 0x00001000>; }; target-module@39000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00039000 0x00001000>; }; target-module@3e000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; reg = <0x0003e074 0x00000004 0x0003e078 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; power-domains = <0x00000036>; clocks = <0x00000037 0x00000000 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0003e000 0x00001000>; rtc@0 { compatible = "ti,am3352-rtc", "ti,da830-rtc"; reg = <0x00000000 0x00001000>; interrupts = <0x0000004b 0x0000004c>; clocks = <0x0000001c 0x00000019 0x00000000 0x00000000>; clock-names = "ext-clk", "int-clk"; system-power-controller; phandle = <0x000000ac>; }; }; target-module@40000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00040000 0x00040000>; }; }; }; interconnect@48000000 { compatible = "ti,am33xx-l4-per", "simple-pm-bus"; power-domains = <0x00000009>; clocks = <0x00000038 0x00000028 0x00000000>; clock-names = "fck"; reg = <0x48000000 0x00000800 0x48000800 0x00000800 0x48001000 0x00000400 0x48001400 0x00000400 0x48001800 0x00000400 0x48001c00 0x00000400>; reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x48000000 0x00100000 0x00100000 0x48100000 0x00100000 0x00200000 0x48200000 0x00100000 0x00300000 0x48300000 0x00100000 0x46000000 0x46000000 0x00400000 0x46400000 0x46400000 0x00400000>; phandle = <0x000000ad>; segment@0 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000800 0x00000800 0x00000800 0x00000800 0x00001000 0x00001000 0x00000400 0x00001400 0x00001400 0x00000400 0x00001800 0x00001800 0x00000400 0x00001c00 0x00001c00 0x00000400 0x00008000 0x00008000 0x00001000 0x00009000 0x00009000 0x00001000 0x00016000 0x00016000 0x00001000 0x00017000 0x00017000 0x00001000 0x00022000 0x00022000 0x00001000 0x00023000 0x00023000 0x00001000 0x00024000 0x00024000 0x00001000 0x00025000 0x00025000 0x00001000 0x0002a000 0x0002a000 0x00001000 0x0002b000 0x0002b000 0x00001000 0x00038000 0x00038000 0x00002000 0x0003a000 0x0003a000 0x00001000 0x00014000 0x00014000 0x00001000 0x00015000 0x00015000 0x00001000 0x0003c000 0x0003c000 0x00002000 0x0003e000 0x0003e000 0x00001000 0x00040000 0x00040000 0x00001000 0x00041000 0x00041000 0x00001000 0x00042000 0x00042000 0x00001000 0x00043000 0x00043000 0x00001000 0x00044000 0x00044000 0x00001000 0x00045000 0x00045000 0x00001000 0x00046000 0x00046000 0x00001000 0x00047000 0x00047000 0x00001000 0x00048000 0x00048000 0x00001000 0x00049000 0x00049000 0x00001000 0x0004c000 0x0004c000 0x00001000 0x0004d000 0x0004d000 0x00001000 0x00050000 0x00050000 0x00002000 0x00052000 0x00052000 0x00001000 0x00060000 0x00060000 0x00001000 0x00061000 0x00061000 0x00001000 0x00080000 0x00080000 0x00010000 0x00090000 0x00090000 0x00001000 0x000a0000 0x000a0000 0x00010000 0x000b0000 0x000b0000 0x00001000 0x00030000 0x00030000 0x00001000 0x00031000 0x00031000 0x00001000 0x0004a000 0x0004a000 0x00001000 0x0004b000 0x0004b000 0x00001000 0x000c8000 0x000c8000 0x00001000 0x000c9000 0x000c9000 0x00001000 0x000cc000 0x000cc000 0x00001000 0x000cd000 0x000cd000 0x00001000 0x000ca000 0x000ca000 0x00001000 0x000cb000 0x000cb000 0x00001000 0x46000000 0x46000000 0x00400000 0x46400000 0x46400000 0x00400000>; target-module@8000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00008000 0x00001000>; }; target-module@14000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00014000 0x00001000>; }; target-module@16000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00016000 0x00001000>; }; target-module@22000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00022050 0x00000004 0x00022054 0x00000004 0x00022058 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000034 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00022000 0x00001000>; serial@0 { compatible = "ti,am3352-uart", "ti,omap3-uart"; clock-frequency = <0x02dc6c00>; reg = <0x00000000 0x00001000>; interrupts = <0x00000049>; status = "disabled"; dmas = <0x00000024 0x0000001c 0x00000000 0x00000024 0x0000001d 0x00000000>; dma-names = "tx", "rx"; phandle = <0x000000ae>; }; }; target-module@24000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00024050 0x00000004 0x00024054 0x00000004 0x00024058 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000038 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00024000 0x00001000>; serial@0 { compatible = "ti,am3352-uart", "ti,omap3-uart"; clock-frequency = <0x02dc6c00>; reg = <0x00000000 0x00001000>; interrupts = <0x0000004a>; status = "disabled"; dmas = <0x00000024 0x0000001e 0x00000000 0x00000024 0x0000001f 0x00000000>; dma-names = "tx", "rx"; phandle = <0x000000af>; }; }; target-module@2a000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x0002a000 0x00000008 0x0002a010 0x00000008 0x0002a090 0x00000008>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000307>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x00000010 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0002a000 0x00001000>; i2c@0 { compatible = "ti,omap4-i2c"; #address-cells = <0x00000001>; #size-cells = <0x00000000>; reg = <0x00000000 0x00001000>; interrupts = <0x00000047>; status = "disabled"; phandle = <0x000000b0>; }; }; target-module@30000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00030000 0x00000004 0x00030110 0x00000004 0x00030114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000303>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x00000014 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00030000 0x00001000>; spi@0 { compatible = "ti,omap4-mcspi"; #address-cells = <0x00000001>; #size-cells = <0x00000000>; reg = <0x00000000 0x00000400>; interrupts = <0x00000041>; ti,spi-num-cs = <0x00000002>; dmas = <0x00000024 0x00000010 0x00000000 0x00000024 0x00000011 0x00000000 0x00000024 0x00000012 0x00000000 0x00000024 0x00000013 0x00000000>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; phandle = <0x000000b1>; }; }; target-module@38000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; reg = <0x00038000 0x00000004 0x00038004 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; clocks = <0x00000039 0x00000018 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00038000 0x00002000 0x46000000 0x46000000 0x00400000>; mcasp@0 { compatible = "ti,am33xx-mcasp-audio"; reg = <0x00000000 0x00002000 0x46000000 0x00400000>; reg-names = "mpu", "dat"; interrupts = <0x00000050 0x00000051>; interrupt-names = "tx", "rx"; status = "okay"; dmas = <0x00000024 0x00000008 0x00000002 0x00000024 0x00000009 0x00000002>; dma-names = "tx", "rx"; #sound-dai-cells = <0x00000000>; pinctrl-names = "default"; pinctrl-0 = <0x0000003a>; op-mode = <0x00000000>; tdm-slots = <0x00000002>; serial-dir = <0x00000000 0x00000000 0x00000001 0x00000000>; tx-num-evt = <0x00000020>; rx-num-evt = <0x00000020>; phandle = <0x00000068>; }; }; target-module@3c000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; reg = <0x0003c000 0x00000004 0x0003c004 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; clocks = <0x00000039 0x0000004c 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0003c000 0x00002000 0x46400000 0x46400000 0x00400000>; mcasp@0 { compatible = "ti,am33xx-mcasp-audio"; reg = <0x00000000 0x00002000 0x46400000 0x00400000>; reg-names = "mpu", "dat"; interrupts = <0x00000052 0x00000053>; interrupt-names = "tx", "rx"; status = "disabled"; dmas = <0x00000024 0x0000000a 0x00000002 0x00000024 0x0000000b 0x00000002>; dma-names = "tx", "rx"; phandle = <0x000000b2>; }; }; target-module@40000 { compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x00040000 0x00000004 0x00040010 0x00000004 0x00040014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000048 0x00000000 0x00000038 0x00000028 0x00000000>; clock-names = "fck", "ick"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00040000 0x00001000>; ti,no-reset-on-init; ti,no-idle; phandle = <0x000000b3>; timer@0 { compatible = "ti,am335x-timer"; reg = <0x00000000 0x00000400>; interrupts = <0x00000044>; clocks = <0x0000003b>; clock-names = "fck"; assigned-clocks = <0x0000003b>; assigned-clock-parents = <0x0000000d>; phandle = <0x000000b4>; }; }; target-module@42000 { compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x00042000 0x00000004 0x00042010 0x00000004 0x00042014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x0000004c 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00042000 0x00001000>; timer@0 { compatible = "ti,am335x-timer"; reg = <0x00000000 0x00000400>; interrupts = <0x00000045>; phandle = <0x000000b5>; }; }; target-module@44000 { compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x00044000 0x00000004 0x00044010 0x00000004 0x00044014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000050 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00044000 0x00001000>; timer@0 { compatible = "ti,am335x-timer"; reg = <0x00000000 0x00000400>; interrupts = <0x0000005c>; ti,timer-pwm; phandle = <0x000000b6>; }; }; target-module@46000 { compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x00046000 0x00000004 0x00046010 0x00000004 0x00046014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x000000b4 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00046000 0x00001000>; timer@0 { compatible = "ti,am335x-timer"; reg = <0x00000000 0x00000400>; interrupts = <0x0000005d>; ti,timer-pwm; phandle = <0x000000b7>; }; }; target-module@48000 { compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x00048000 0x00000004 0x00048010 0x00000004 0x00048014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x000000b8 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00048000 0x00001000>; timer@0 { compatible = "ti,am335x-timer"; reg = <0x00000000 0x00000400>; interrupts = <0x0000005e>; ti,timer-pwm; phandle = <0x000000b8>; }; }; target-module@4a000 { compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x0004a000 0x00000004 0x0004a010 0x00000004 0x0004a014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000044 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0004a000 0x00001000>; timer@0 { compatible = "ti,am335x-timer"; reg = <0x00000000 0x00000400>; interrupts = <0x0000005f>; ti,timer-pwm; phandle = <0x000000b9>; }; }; target-module@4c000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x0004c000 0x00000004 0x0004c010 0x00000004 0x0004c114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x00000074 0x00000000 0x00000038 0x00000074 0x00000012>; clock-names = "fck", "dbclk"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0004c000 0x00001000>; gpio@0 { compatible = "ti,omap4-gpio"; gpio-ranges = <0x00000023 0x00000000 0x00000000 0x00000008 0x00000023 0x00000008 0x0000005a 0x00000004 0x00000023 0x0000000c 0x0000000c 0x00000010 0x00000023 0x0000001c 0x0000001e 0x00000004>; gpio-controller; #gpio-cells = <0x00000002>; interrupt-controller; #interrupt-cells = <0x00000002>; reg = <0x00000000 0x00001000>; interrupts = <0x00000062>; gpio-line-names = "P8_25 [mmc1_dat0]", "[mmc1_dat1]", "P8_5 [mmc1_dat2]", "P8_6 [mmc1_dat3]", "P8_23 [mmc1_dat4]", "P8_22 [mmc1_dat5]", "P8_3 [mmc1_dat6]", "P8_4 [mmc1_dat7]", "NC", "NC", "NC", "NC", "P8_12", "P8_11", "P8_16", "P8_15", "P9_15A", "P9_23", "P9_14 [ehrpwm1a]", "P9_16 [ehrpwm1b]", "[emmc rst]", "[usr0 led]", "[usr1 led]", "[usr2 led]", "[usr3 led]", "[hdmi irq]", "[usb vbus oc]", "[hdmi audio]", "P9_12", "P8_26", "P8_21 [emmc]", "P8_20 [emmc]"; phandle = <0x00000028>; }; }; target-module@50000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00050000 0x00002000>; }; target-module@60000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000602fc 0x00000004 0x00060110 0x00000004 0x00060114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000307>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x00000004 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00060000 0x00001000>; mmc@0 { compatible = "ti,am335-sdhci"; ti,needs-special-reset; dmas = <0x00000024 0x00000018 0x00000000 0x00000024 0x00000019 0x00000000>; dma-names = "tx", "rx"; interrupts = <0x00000040>; reg = <0x00000000 0x00001000>; status = "okay"; bus-width = <0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000003c>; cd-gpios = <0x0000003d 0x00000006 0x00000001>; vmmc-supply = <0x0000003e>; phandle = <0x000000ba>; }; }; target-module@80000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00080000 0x00000004 0x00080010 0x00000004 0x00080014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000303>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x00000008 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00080000 0x00010000>; elm@0 { compatible = "ti,am3352-elm"; reg = <0x00000000 0x00002000>; interrupts = <0x00000004>; status = "disabled"; phandle = <0x000000bb>; }; }; target-module@a0000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000a0000 0x00010000>; }; target-module@c8000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x000c8000 0x00000004 0x000c8010 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; clocks = <0x00000038 0x000000d8 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000c8000 0x00001000>; mailbox@0 { compatible = "ti,omap4-mailbox"; reg = <0x00000000 0x00000200>; interrupts = <0x0000004d>; #mbox-cells = <0x00000001>; ti,mbox-num-users = <0x00000004>; ti,mbox-num-fifos = <0x00000008>; phandle = <0x00000033>; mbox-wkup-m3 { ti,mbox-send-noirq; ti,mbox-tx = <0x00000000 0x00000000 0x00000000>; ti,mbox-rx = <0x00000000 0x00000000 0x00000003>; phandle = <0x00000034>; }; }; }; target-module@ca000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000ca000 0x00000004 0x000ca010 0x00000004 0x000ca014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000307>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x000000d4 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000ca000 0x00001000>; spinlock@0 { compatible = "ti,omap4-hwspinlock"; reg = <0x00000000 0x00001000>; #hwlock-cells = <0x00000001>; phandle = <0x000000bc>; }; }; target-module@cc000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000cc000 0x00001000>; }; }; segment@100000 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x0008c000 0x0018c000 0x00001000 0x0008d000 0x0018d000 0x00001000 0x0008e000 0x0018e000 0x00001000 0x0008f000 0x0018f000 0x00001000 0x0009c000 0x0019c000 0x00001000 0x0009d000 0x0019d000 0x00001000 0x000a6000 0x001a6000 0x00001000 0x000a7000 0x001a7000 0x00001000 0x000a8000 0x001a8000 0x00001000 0x000a9000 0x001a9000 0x00001000 0x000aa000 0x001aa000 0x00001000 0x000ab000 0x001ab000 0x00001000 0x000ac000 0x001ac000 0x00001000 0x000ad000 0x001ad000 0x00001000 0x000ae000 0x001ae000 0x00001000 0x000af000 0x001af000 0x00001000 0x000b0000 0x001b0000 0x00010000 0x000c0000 0x001c0000 0x00001000 0x000cc000 0x001cc000 0x00002000 0x000ce000 0x001ce000 0x00002000 0x000d0000 0x001d0000 0x00002000 0x000d2000 0x001d2000 0x00002000 0x000d8000 0x001d8000 0x00001000 0x000d9000 0x001d9000 0x00001000 0x000a0000 0x001a0000 0x00001000 0x000a1000 0x001a1000 0x00001000 0x000a2000 0x001a2000 0x00001000 0x000a3000 0x001a3000 0x00001000 0x000a4000 0x001a4000 0x00001000 0x000a5000 0x001a5000 0x00001000>; target-module@8c000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0008c000 0x00001000>; }; target-module@8e000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0008e000 0x00001000>; }; target-module@9c000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x0009c000 0x00000008 0x0009c010 0x00000008 0x0009c090 0x00000008>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000307>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x0000000c 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0009c000 0x00001000>; i2c@0 { compatible = "ti,omap4-i2c"; #address-cells = <0x00000001>; #size-cells = <0x00000000>; reg = <0x00000000 0x00001000>; interrupts = <0x0000001e>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x0000003f>; clock-frequency = <0x000186a0>; symlink = "bone/i2c/2"; phandle = <0x000000bd>; cape_eeprom0@54 { compatible = "atmel,24c256"; reg = <0x00000054>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; phandle = <0x000000be>; cape_data@0 { reg = <0x00000000 0x00000100>; phandle = <0x000000bf>; }; }; cape_eeprom1@55 { compatible = "atmel,24c256"; reg = <0x00000055>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; phandle = <0x000000c0>; cape_data@0 { reg = <0x00000000 0x00000100>; phandle = <0x000000c1>; }; }; cape_eeprom2@56 { compatible = "atmel,24c256"; reg = <0x00000056>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; phandle = <0x000000c2>; cape_data@0 { reg = <0x00000000 0x00000100>; phandle = <0x000000c3>; }; }; cape_eeprom3@57 { compatible = "atmel,24c256"; reg = <0x00000057>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; phandle = <0x000000c4>; cape_data@0 { reg = <0x00000000 0x00000100>; phandle = <0x000000c5>; }; }; }; }; target-module@a0000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000a0000 0x00000004 0x000a0110 0x00000004 0x000a0114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000303>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x00000018 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000a0000 0x00001000>; spi@0 { compatible = "ti,omap4-mcspi"; #address-cells = <0x00000001>; #size-cells = <0x00000000>; reg = <0x00000000 0x00000400>; interrupts = <0x0000007d>; ti,spi-num-cs = <0x00000002>; dmas = <0x00000024 0x0000002a 0x00000000 0x00000024 0x0000002b 0x00000000 0x00000024 0x0000002c 0x00000000 0x00000024 0x0000002d 0x00000000>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; phandle = <0x000000c6>; }; }; target-module@a2000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000a2000 0x00001000>; }; target-module@a4000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000a4000 0x00001000>; }; target-module@a6000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000a6050 0x00000004 0x000a6054 0x00000004 0x000a6058 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x0000003c 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000a6000 0x00001000>; serial@0 { compatible = "ti,am3352-uart", "ti,omap3-uart"; clock-frequency = <0x02dc6c00>; reg = <0x00000000 0x00001000>; interrupts = <0x0000002c>; status = "disabled"; phandle = <0x000000c7>; }; }; target-module@a8000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000a8050 0x00000004 0x000a8054 0x00000004 0x000a8058 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000040 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000a8000 0x00001000>; serial@0 { compatible = "ti,am3352-uart", "ti,omap3-uart"; clock-frequency = <0x02dc6c00>; reg = <0x00000000 0x00001000>; interrupts = <0x0000002d>; status = "disabled"; symlink = "bone/uart/4"; pinctrl-names = "default"; pinctrl-0 = <0x00000040>; phandle = <0x000000c8>; }; }; target-module@aa000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000aa050 0x00000004 0x000aa054 0x00000004 0x000aa058 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000000 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000aa000 0x00001000>; serial@0 { compatible = "ti,am3352-uart", "ti,omap3-uart"; clock-frequency = <0x02dc6c00>; reg = <0x00000000 0x00001000>; interrupts = <0x0000002e>; status = "disabled"; phandle = <0x000000c9>; }; }; target-module@ac000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000ac000 0x00000004 0x000ac010 0x00000004 0x000ac114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x00000078 0x00000000 0x00000038 0x00000078 0x00000012>; clock-names = "fck", "dbclk"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000ac000 0x00001000>; gpio@0 { compatible = "ti,omap4-gpio"; gpio-ranges = <0x00000023 0x00000000 0x00000022 0x00000012 0x00000023 0x00000012 0x0000004d 0x00000004 0x00000023 0x00000016 0x00000038 0x0000000a>; gpio-controller; #gpio-cells = <0x00000002>; interrupt-controller; #interrupt-cells = <0x00000002>; reg = <0x00000000 0x00001000>; interrupts = <0x00000020>; gpio-line-names = "P9_15B", "P8_18", "P8_7", "P8_8", "P8_10", "P8_9", "P8_45 [hdmi]", "P8_46 [hdmi]", "P8_43 [hdmi]", "P8_44 [hdmi]", "P8_41 [hdmi]", "P8_42 [hdmi]", "P8_39 [hdmi]", "P8_40 [hdmi]", "P8_37 [hdmi]", "P8_38 [hdmi]", "P8_36 [hdmi]", "P8_34 [hdmi]", "[rmii1_rxd3]", "[rmii1_rxd2]", "[rmii1_rxd1]", "[rmii1_rxd0]", "P8_27 [hdmi]", "P8_29 [hdmi]", "P8_28 [hdmi]", "P8_30 [hdmi]", "[mmc0_dat3]", "[mmc0_dat2]", "[mmc0_dat1]", "[mmc0_dat0]", "[mmc0_clk]", "[mmc0_cmd]"; phandle = <0x000000ca>; }; }; target-module@ae000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000ae000 0x00000004 0x000ae010 0x00000004 0x000ae114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000007>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x0000007c 0x00000000 0x00000038 0x0000007c 0x00000012>; clock-names = "fck", "dbclk"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000ae000 0x00001000>; phandle = <0x000000cb>; gpio@0 { compatible = "ti,omap4-gpio"; gpio-ranges = <0x00000023 0x00000000 0x00000042 0x00000005 0x00000023 0x00000005 0x00000062 0x00000002 0x00000023 0x00000007 0x0000004b 0x00000002 0x00000023 0x0000000d 0x0000008d 0x00000001 0x00000023 0x0000000e 0x00000064 0x00000008>; gpio-controller; #gpio-cells = <0x00000002>; interrupt-controller; #interrupt-cells = <0x00000002>; reg = <0x00000000 0x00001000>; interrupts = <0x0000003e>; gpio-line-names = "[mii col]", "[mii crs]", "[mii rx err]", "[mii tx en]", "[mii rx dv]", "[i2c0 sda]", "[i2c0 scl]", "[jtag emu0]", "[jtag emu1]", "[mii tx clk]", "[mii rx clk]", "NC", "NC", "[usb vbus en]", "P9_31 [spi1_sclk]", "P9_29 [spi1_d0]", "P9_30 [spi1_d1]", "P9_28 [spi1_cs0]", "P9_42B [ecappwm0]", "P9_27", "P9_41A", "P9_25", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC"; phandle = <0x000000cc>; }; }; target-module@b0000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000b0000 0x00010000>; }; target-module@cc000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x000cc020 0x00000004>; reg-names = "rev"; clocks = <0x00000038 0x00000088 0x00000000 0x00000041>; clock-names = "fck", "osc"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000cc000 0x00002000>; can@0 { compatible = "ti,am3352-d_can"; reg = <0x00000000 0x00002000>; clocks = <0x00000041>; clock-names = "fck"; syscon-raminit = <0x00000006 0x00000644 0x00000000>; interrupts = <0x00000034>; status = "disabled"; phandle = <0x000000cd>; }; }; target-module@d0000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x000d0020 0x00000004>; reg-names = "rev"; clocks = <0x00000038 0x0000008c 0x00000000 0x00000042>; clock-names = "fck", "osc"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000d0000 0x00002000>; can@0 { compatible = "ti,am3352-d_can"; reg = <0x00000000 0x00002000>; clocks = <0x00000042>; clock-names = "fck"; syscon-raminit = <0x00000006 0x00000644 0x00000001>; interrupts = <0x00000037>; status = "disabled"; symlink = "bone/can/1"; pinctrl-names = "default"; pinctrl-0 = <0x00000043>; phandle = <0x000000ce>; }; }; target-module@d8000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x000d82fc 0x00000004 0x000d8110 0x00000004 0x000d8114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000307>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000038 0x000000bc 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x000d8000 0x00001000>; mmc@0 { compatible = "ti,am335-sdhci"; ti,needs-special-reset; dmas = <0x00000024 0x00000002 0x00000000 0x00000024 0x00000003 0x00000000>; dma-names = "tx", "rx"; interrupts = <0x0000001c>; reg = <0x00000000 0x00001000>; status = "okay"; vmmc-supply = <0x0000003e>; pinctrl-names = "default"; pinctrl-0 = <0x00000044>; bus-width = <0x00000008>; non-removable; phandle = <0x000000cf>; }; }; }; segment@200000 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00200000 0x00010000>; target-module@0 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; power-domains = <0x00000045>; clocks = <0x00000046 0x00000004 0x00000000>; clock-names = "fck"; ti,no-idle; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00010000>; mpu@0 { compatible = "ti,omap3-mpu"; pm-sram = <0x00000047 0x00000048>; }; }; }; segment@300000 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00300000 0x00001000 0x00001000 0x00301000 0x00001000 0x00002000 0x00302000 0x00001000 0x00003000 0x00303000 0x00001000 0x00004000 0x00304000 0x00001000 0x00005000 0x00305000 0x00001000 0x0000e000 0x0030e000 0x00001000 0x0000f000 0x0030f000 0x00001000 0x00018000 0x00318000 0x00004000 0x0001c000 0x0031c000 0x00001000 0x00010000 0x00310000 0x00002000 0x00012000 0x00312000 0x00001000 0x00015000 0x00315000 0x00001000 0x00016000 0x00316000 0x00001000 0x00017000 0x00317000 0x00001000 0x00013000 0x00313000 0x00001000 0x00014000 0x00314000 0x00001000 0x00020000 0x00320000 0x00001000 0x00021000 0x00321000 0x00001000 0x00022000 0x00322000 0x00001000 0x00023000 0x00323000 0x00001000 0x00024000 0x00324000 0x00001000 0x00025000 0x00325000 0x00001000>; target-module@0 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x00000000 0x00000004 0x00000004 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-midle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x0000009c 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00001000>; epwmss@0 { compatible = "ti,am33xx-pwmss"; reg = <0x00000000 0x00000010>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; status = "disabled"; ranges = <0x00000000 0x00000000 0x00001000>; phandle = <0x000000d0>; pwm@100 { compatible = "ti,am3352-ecap"; #pwm-cells = <0x00000003>; reg = <0x00000100 0x00000080>; clocks = <0x00000031>; clock-names = "fck"; status = "disabled"; phandle = <0x000000d1>; }; counter@180 { compatible = "ti,am3352-eqep"; reg = <0x00000180 0x00000080>; clocks = <0x00000031>; clock-names = "sysclkout"; interrupts = <0x0000004f>; status = "disabled"; phandle = <0x000000d2>; }; pwm@200 { compatible = "ti,am3352-ehrpwm"; #pwm-cells = <0x00000003>; reg = <0x00000200 0x00000080>; clocks = <0x00000049 0x00000031>; clock-names = "tbclk", "fck"; status = "disabled"; phandle = <0x000000d3>; }; }; }; target-module@2000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x00002000 0x00000004 0x00002004 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-midle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x00000094 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00002000 0x00001000>; epwmss@0 { compatible = "ti,am33xx-pwmss"; reg = <0x00000000 0x00000010>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; status = "disabled"; ranges = <0x00000000 0x00000000 0x00001000>; phandle = <0x000000d4>; pwm@100 { compatible = "ti,am3352-ecap"; #pwm-cells = <0x00000003>; reg = <0x00000100 0x00000080>; clocks = <0x00000031>; clock-names = "fck"; status = "disabled"; phandle = <0x000000d5>; }; counter@180 { compatible = "ti,am3352-eqep"; reg = <0x00000180 0x00000080>; clocks = <0x00000031>; clock-names = "sysclkout"; interrupts = <0x00000058>; status = "disabled"; phandle = <0x000000d6>; }; pwm@200 { compatible = "ti,am3352-ehrpwm"; #pwm-cells = <0x00000003>; reg = <0x00000200 0x00000080>; clocks = <0x0000004a 0x00000031>; clock-names = "tbclk", "fck"; status = "disabled"; phandle = <0x000000d7>; }; }; }; target-module@4000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x00004000 0x00000004 0x00004004 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-midle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; clocks = <0x00000038 0x000000a0 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00004000 0x00001000>; epwmss@0 { compatible = "ti,am33xx-pwmss"; reg = <0x00000000 0x00000010>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; status = "disabled"; ranges = <0x00000000 0x00000000 0x00001000>; phandle = <0x000000d8>; pwm@100 { compatible = "ti,am3352-ecap"; #pwm-cells = <0x00000003>; reg = <0x00000100 0x00000080>; clocks = <0x00000031>; clock-names = "fck"; status = "disabled"; phandle = <0x000000d9>; }; counter@180 { compatible = "ti,am3352-eqep"; reg = <0x00000180 0x00000080>; clocks = <0x00000031>; clock-names = "sysclkout"; interrupts = <0x00000059>; status = "disabled"; phandle = <0x000000da>; }; pwm@200 { compatible = "ti,am3352-ehrpwm"; #pwm-cells = <0x00000003>; reg = <0x00000200 0x00000080>; clocks = <0x0000004b 0x00000031>; clock-names = "tbclk", "fck"; status = "disabled"; phandle = <0x000000db>; }; }; }; target-module@e000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x0000e000 0x00000004 0x0000e054 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-midle = <0x00000000 0x00000001 0x00000002>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; clocks = <0x0000004c 0x00000000 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0000e000 0x00001000>; lcdc@0 { compatible = "ti,am33xx-tilcdc"; reg = <0x00000000 0x00001000>; interrupts = <0x00000024>; status = "okay"; blue-and-red-wiring = "straight"; phandle = <0x000000dc>; port { endpoint@0 { remote-endpoint = <0x0000004d>; phandle = <0x0000002b>; }; }; }; }; target-module@10000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x00011fe0 0x00000004 0x00011fe4 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-mask = <0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001>; clocks = <0x00000038 0x00000058 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00010000 0x00002000>; rng@0 { compatible = "ti,omap4-rng"; reg = <0x00000000 0x00002000>; interrupts = <0x0000006f>; phandle = <0x000000dd>; }; }; target-module@13000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00013000 0x00001000>; }; target-module@15000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00015000 0x00001000 0x00001000 0x00016000 0x00001000>; }; target-module@18000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00018000 0x00004000>; }; target-module@20000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00020000 0x00001000>; }; target-module@22000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00022000 0x00001000>; }; target-module@24000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00024000 0x00001000>; }; }; }; interconnect@47c00000 { compatible = "ti,am33xx-l4-fw", "simple-bus"; reg = <0x47c00000 0x00000800 0x47c00800 0x00000800 0x47c01000 0x00000400>; reg-names = "ap", "la", "ia0"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x47c00000 0x01000000>; phandle = <0x000000de>; segment@0 { compatible = "simple-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000800 0x00000800 0x00000800 0x00000800 0x00001000 0x00001000 0x00000400 0x0000c000 0x0000c000 0x00001000 0x0000d000 0x0000d000 0x00001000 0x0000e000 0x0000e000 0x00001000 0x0000f000 0x0000f000 0x00001000 0x00010000 0x00010000 0x00001000 0x00011000 0x00011000 0x00001000 0x0001a000 0x0001a000 0x00001000 0x0001b000 0x0001b000 0x00001000 0x00024000 0x00024000 0x00001000 0x00025000 0x00025000 0x00001000 0x00026000 0x00026000 0x00001000 0x00027000 0x00027000 0x00001000 0x00030000 0x00030000 0x00001000 0x00031000 0x00031000 0x00001000 0x00038000 0x00038000 0x00001000 0x00039000 0x00039000 0x00001000 0x0003a000 0x0003a000 0x00001000 0x0003b000 0x0003b000 0x00001000 0x0003e000 0x0003e000 0x00001000 0x0003f000 0x0003f000 0x00001000 0x0003c000 0x0003c000 0x00001000 0x00040000 0x00040000 0x00001000 0x00046000 0x00046000 0x00001000 0x00047000 0x00047000 0x00001000 0x00044000 0x00044000 0x00001000 0x00045000 0x00045000 0x00001000 0x00028000 0x00028000 0x00001000 0x00029000 0x00029000 0x00001000 0x00032000 0x00032000 0x00001000 0x00033000 0x00033000 0x00001000 0x0003d000 0x0003d000 0x00001000 0x00041000 0x00041000 0x00001000 0x00042000 0x00042000 0x00001000 0x00043000 0x00043000 0x00001000 0x00014000 0x00014000 0x00001000 0x00015000 0x00015000 0x00001000>; target-module@c000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0000c000 0x00001000>; }; target-module@e000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0000e000 0x00001000>; }; target-module@10000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00010000 0x00001000>; }; target-module@14000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00014000 0x00001000>; }; target-module@1a000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0001a000 0x00001000>; }; target-module@24000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00024000 0x00001000>; }; target-module@26000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00026000 0x00001000>; }; target-module@28000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00028000 0x00001000>; }; target-module@30000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00030000 0x00001000>; }; target-module@32000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00032000 0x00001000>; }; target-module@38000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00038000 0x00001000>; }; target-module@3a000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0003a000 0x00001000>; }; target-module@3c000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0003c000 0x00001000>; }; target-module@3e000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x0003e000 0x00001000>; }; target-module@40000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00040000 0x00001000>; }; target-module@42000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00042000 0x00001000>; }; target-module@44000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00044000 0x00001000>; }; target-module@46000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00046000 0x00001000>; }; }; }; interconnect@4a000000 { compatible = "ti,am33xx-l4-fast", "simple-pm-bus"; power-domains = <0x00000009>; clocks = <0x0000004e 0x00000000 0x00000000>; clock-names = "fck"; reg = <0x4a000000 0x00000800 0x4a000800 0x00000800 0x4a001000 0x00000400>; reg-names = "ap", "la", "ia0"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x4a000000 0x01000000>; phandle = <0x000000df>; segment@0 { compatible = "simple-pm-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000800 0x00000800 0x00000800 0x00000800 0x00001000 0x00001000 0x00000400 0x00100000 0x00100000 0x00008000 0x00108000 0x00108000 0x00001000 0x00180000 0x00180000 0x00020000 0x001a0000 0x001a0000 0x00001000 0x00200000 0x00200000 0x00080000 0x00280000 0x00280000 0x00001000 0x00300000 0x00300000 0x00080000 0x00380000 0x00380000 0x00001000>; target-module@100000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; reg = <0x00101200 0x00000004 0x00101208 0x00000004 0x00101204 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000000>; ti,sysc-midle = <0x00000000 0x00000001>; ti,sysc-sidle = <0x00000000 0x00000001>; ti,syss-mask = <0x00000001>; clocks = <0x0000004f 0x00000014 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00100000 0x00008000>; ethernet@0 { compatible = "ti,am335x-cpsw", "ti,cpsw"; clocks = <0x00000050 0x00000051>; clock-names = "fck", "cpts"; cpdma_channels = <0x00000008>; ale_entries = <0x00000400>; bd_ram_size = <0x00002000>; mac_control = <0x00000020>; slaves = <0x00000002>; active_slave = <0x00000000>; cpts_clock_mult = <0x80000000>; cpts_clock_shift = <0x0000001d>; reg = <0x00000000 0x00000800 0x00001200 0x00000100>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; interrupts = <0x00000028 0x00000029 0x0000002a 0x0000002b>; ranges = <0x00000000 0x00000000 0x00008000>; syscon = <0x00000006>; status = "disabled"; phandle = <0x000000e0>; mdio@1000 { compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; clocks = <0x0000004f 0x00000014 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000000>; bus_freq = <0x000f4240>; reg = <0x00001000 0x00000100>; status = "disabled"; phandle = <0x000000e1>; }; slave@200 { mac-address = [00 00 00 00 00 00]; phys = <0x00000052 0x00000001 0x00000001>; phandle = <0x000000e2>; }; slave@300 { mac-address = [00 00 00 00 00 00]; phys = <0x00000052 0x00000002 0x00000001>; phandle = <0x000000e3>; }; }; switch@0 { compatible = "ti,am335x-cpsw-switch", "ti,cpsw-switch"; reg = <0x00000000 0x00004000>; ranges = <0x00000000 0x00000000 0x00004000>; clocks = <0x00000050>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; syscon = <0x00000006>; status = "okay"; interrupts = <0x00000028 0x00000029 0x0000002a 0x0000002b>; interrupt-names = "rx_thresh", "rx", "tx", "misc"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000053>; pinctrl-1 = <0x00000054>; phandle = <0x000000e4>; ethernet-ports { #address-cells = <0x00000001>; #size-cells = <0x00000000>; port@1 { reg = <0x00000001>; label = "port1"; mac-address = [00 00 00 00 00 00]; phys = <0x00000052 0x00000001 0x00000001>; phy-handle = <0x00000055>; phy-mode = "mii"; ti,dual-emac-pvid = <0x00000001>; phandle = <0x000000e5>; }; port@2 { reg = <0x00000002>; label = "port2"; mac-address = [00 00 00 00 00 00]; phys = <0x00000052 0x00000002 0x00000001>; status = "disabled"; phandle = <0x000000e6>; }; }; mdio@1000 { compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; clocks = <0x00000050>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000000>; bus_freq = <0x000f4240>; reg = <0x00001000 0x00000100>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000056>; pinctrl-1 = <0x00000057>; phandle = <0x000000e7>; ethernet-phy@0 { reg = <0x00000000>; reset-gpios = <0x00000028 0x00000008 0x00000001>; reset-assert-us = <0x0000012c>; reset-deassert-us = <0x00001964>; phandle = <0x00000055>; }; }; cpts { clocks = <0x00000051>; clock-names = "cpts"; }; }; }; target-module@180000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00180000 0x00020000>; }; target-module@200000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00200000 0x00080000>; }; target-module@300000 { compatible = "ti,sysc-pruss", "ti,sysc"; reg = <0x00326000 0x00000004 0x00326004 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-mask = <0x00000030>; ti,sysc-midle = <0x00000000 0x00000001 0x00000002>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; clocks = <0x00000058 0x00000000 0x00000000>; clock-names = "fck"; resets = <0x00000009 0x00000001>; reset-names = "rstctrl"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00300000 0x00080000>; status = "okay"; phandle = <0x000000e8>; pruss@0 { compatible = "ti,am3356-pruss"; reg = <0x00000000 0x00080000>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges; phandle = <0x000000e9>; memories@0 { reg = <0x00000000 0x00002000 0x00002000 0x00002000 0x00010000 0x00003000>; reg-names = "dram0", "dram1", "shrdram2"; phandle = <0x000000ea>; }; cfg@26000 { compatible = "ti,pruss-cfg", "syscon"; reg = <0x00026000 0x00002000>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00026000 0x00002000>; phandle = <0x000000eb>; clocks { #address-cells = <0x00000001>; #size-cells = <0x00000000>; iepclk-mux@30 { reg = <0x00000030>; #clock-cells = <0x00000000>; clocks = <0x00000017 0x00000059>; phandle = <0x000000ec>; }; }; }; serial@28000 { compatible = "ti,pruss-uart"; reg = <0x00028000 0x00000038>; clocks = <0x00000014>; interrupt-parent = <0x0000005a>; status = "disabled"; phandle = <0x000000ed>; }; mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x00032000 0x00000058>; phandle = <0x000000ee>; }; interrupt-controller@20000 { compatible = "ti,pruss-intc"; reg = <0x00020000 0x00002000>; interrupts = <0x00000014 0x00000015 0x00000016 0x00000017 0x00000018 0x00000019 0x0000001a 0x0000001b>; interrupt-names = "host_intr0", "host_intr1", "host_intr2", "host_intr3", "host_intr4", "host_intr5", "host_intr6", "host_intr7"; interrupt-controller; #interrupt-cells = <0x00000003>; phandle = <0x0000005a>; }; pru@34000 { compatible = "ti,am3356-pru"; reg = <0x00034000 0x00002000 0x00022000 0x00000400 0x00022400 0x00000100>; reg-names = "iram", "control", "debug"; firmware-name = "am335x-pru0-fw"; phandle = <0x000000ef>; }; pru@38000 { compatible = "ti,am3356-pru"; reg = <0x00038000 0x00002000 0x00024000 0x00000400 0x00024400 0x00000100>; reg-names = "iram", "control", "debug"; firmware-name = "am335x-pru1-fw"; phandle = <0x000000f0>; }; mdio@32400 { compatible = "ti,davinci_mdio"; reg = <0x00032400 0x00000090>; clocks = <0x00000016>; clock-names = "fck"; bus_freq = <0x000f4240>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; status = "disabled"; phandle = <0x000000f1>; }; }; }; }; }; interconnect@4b140000 { compatible = "ti,am33xx-l4-mpuss", "simple-bus"; reg = <0x4b144400 0x00000100 0x4b144800 0x00000400>; reg-names = "la", "ap"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x4b140000 0x00008000>; phandle = <0x000000f2>; segment@0 { compatible = "simple-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00004800 0x00004800 0x00000400 0x00001000 0x00001000 0x00001000 0x00002000 0x00002000 0x00001000 0x00004000 0x00004000 0x00000400 0x00005000 0x00005000 0x00000400 0x00000000 0x00000000 0x00001000 0x00003000 0x00003000 0x00001000 0x00000800 0x00000800 0x00000800>; target-module@0 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00001000 0x00001000 0x00001000 0x00001000 0x00002000 0x00002000 0x00001000>; }; target-module@3000 { compatible = "ti,sysc"; status = "disabled"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00003000 0x00001000>; }; }; }; interrupt-controller@48200000 { compatible = "ti,am33xx-intc"; interrupt-controller; #interrupt-cells = <0x00000001>; reg = <0x48200000 0x00001000>; phandle = <0x00000001>; }; target-module@49000000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x49000000 0x00000004>; reg-names = "rev"; clocks = <0x00000007 0x00000098 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x49000000 0x00010000>; dma@0 { compatible = "ti,edma3-tpcc"; reg = <0x00000000 0x00010000>; reg-names = "edma3_cc"; interrupts = <0x0000000c 0x0000000d 0x0000000e>; interrupt-names = "edma3_ccint", "edma3_mperr", "edma3_ccerrint"; dma-requests = <0x00000040>; #dma-cells = <0x00000002>; ti,tptcs = <0x0000005b 0x00000007 0x0000005c 0x00000005 0x0000005d 0x00000000>; ti,edma-memcpy-channels = <0x00000014 0x00000015>; phandle = <0x00000024>; }; }; target-module@49800000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x49800000 0x00000004 0x49800010 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-mask = <0x00000001>; ti,sysc-midle = <0x00000000>; ti,sysc-sidle = <0x00000000 0x00000002>; clocks = <0x00000007 0x00000000 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x49800000 0x00100000>; dma@0 { compatible = "ti,edma3-tptc"; reg = <0x00000000 0x00100000>; interrupts = <0x00000070>; interrupt-names = "edma3_tcerrint"; phandle = <0x0000005b>; }; }; target-module@49900000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x49900000 0x00000004 0x49900010 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-mask = <0x00000001>; ti,sysc-midle = <0x00000000>; ti,sysc-sidle = <0x00000000 0x00000002>; clocks = <0x00000007 0x000000d8 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x49900000 0x00100000>; dma@0 { compatible = "ti,edma3-tptc"; reg = <0x00000000 0x00100000>; interrupts = <0x00000071>; interrupt-names = "edma3_tcerrint"; phandle = <0x0000005c>; }; }; target-module@49a00000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x49a00000 0x00000004 0x49a00010 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-mask = <0x00000001>; ti,sysc-midle = <0x00000000>; ti,sysc-sidle = <0x00000000 0x00000002>; clocks = <0x00000007 0x000000dc 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x49a00000 0x00100000>; dma@0 { compatible = "ti,edma3-tptc"; reg = <0x00000000 0x00100000>; interrupts = <0x00000072>; interrupt-names = "edma3_tcerrint"; phandle = <0x0000005d>; }; }; target-module@47810000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x478102fc 0x00000004 0x47810110 0x00000004 0x47810114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000307>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000039 0x000000dc 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x47810000 0x00001000>; mmc@0 { compatible = "ti,am335-sdhci"; ti,needs-special-reset; interrupts = <0x0000001d>; reg = <0x00000000 0x00001000>; status = "disabled"; phandle = <0x000000f3>; }; }; target-module@47400000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x47400000 0x00000004 0x47400010 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-mask = <0x00000003>; ti,sysc-midle = <0x00000000 0x00000001 0x00000002>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,sysc-delay-us = <0x00000002>; clocks = <0x00000039 0x00000000 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x47400000 0x00008000>; phandle = <0x000000f4>; usb-phy@1300 { compatible = "ti,am335x-usb-phy"; reg = <0x00001300 0x00000100>; reg-names = "phy"; ti,ctrl_mod = <0x0000005e>; #phy-cells = <0x00000000>; phandle = <0x0000005f>; }; usb@1400 { compatible = "ti,musb-am33xx"; reg = <0x00001400 0x00000400 0x00001000 0x00000200>; reg-names = "mc", "control"; interrupts = <0x00000012>; interrupt-names = "mc", "vbus"; dr_mode = "peripheral"; mentor,multipoint = <0x00000001>; mentor,num-eps = <0x00000010>; mentor,ram-bits = <0x0000000c>; mentor,power = <0x000001f4>; phys = <0x0000005f>; dmas = <0x00000060 0x00000000 0x00000000 0x00000060 0x00000001 0x00000000 0x00000060 0x00000002 0x00000000 0x00000060 0x00000003 0x00000000 0x00000060 0x00000004 0x00000000 0x00000060 0x00000005 0x00000000 0x00000060 0x00000006 0x00000000 0x00000060 0x00000007 0x00000000 0x00000060 0x00000008 0x00000000 0x00000060 0x00000009 0x00000000 0x00000060 0x0000000a 0x00000000 0x00000060 0x0000000b 0x00000000 0x00000060 0x0000000c 0x00000000 0x00000060 0x0000000d 0x00000000 0x00000060 0x0000000e 0x00000000 0x00000060 0x00000000 0x00000001 0x00000060 0x00000001 0x00000001 0x00000060 0x00000002 0x00000001 0x00000060 0x00000003 0x00000001 0x00000060 0x00000004 0x00000001 0x00000060 0x00000005 0x00000001 0x00000060 0x00000006 0x00000001 0x00000060 0x00000007 0x00000001 0x00000060 0x00000008 0x00000001 0x00000060 0x00000009 0x00000001 0x00000060 0x0000000a 0x00000001 0x00000060 0x0000000b 0x00000001 0x00000060 0x0000000c 0x00000001 0x00000060 0x0000000d 0x00000001 0x00000060 0x0000000e 0x00000001>; dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; interrupts-extended = <0x00000001 0x00000012 0x00000061 0x00000000>; phandle = <0x000000f5>; }; usb-phy@1b00 { compatible = "ti,am335x-usb-phy"; reg = <0x00001b00 0x00000100>; reg-names = "phy"; ti,ctrl_mod = <0x0000005e>; #phy-cells = <0x00000000>; phandle = <0x00000062>; }; usb@1800 { compatible = "ti,musb-am33xx"; reg = <0x00001c00 0x00000400 0x00001800 0x00000200>; reg-names = "mc", "control"; interrupts = <0x00000013>; interrupt-names = "mc"; dr_mode = "host"; mentor,multipoint = <0x00000001>; mentor,num-eps = <0x00000010>; mentor,ram-bits = <0x0000000c>; mentor,power = <0x000001f4>; phys = <0x00000062>; dmas = <0x00000060 0x0000000f 0x00000000 0x00000060 0x00000010 0x00000000 0x00000060 0x00000011 0x00000000 0x00000060 0x00000012 0x00000000 0x00000060 0x00000013 0x00000000 0x00000060 0x00000014 0x00000000 0x00000060 0x00000015 0x00000000 0x00000060 0x00000016 0x00000000 0x00000060 0x00000017 0x00000000 0x00000060 0x00000018 0x00000000 0x00000060 0x00000019 0x00000000 0x00000060 0x0000001a 0x00000000 0x00000060 0x0000001b 0x00000000 0x00000060 0x0000001c 0x00000000 0x00000060 0x0000001d 0x00000000 0x00000060 0x0000000f 0x00000001 0x00000060 0x00000010 0x00000001 0x00000060 0x00000011 0x00000001 0x00000060 0x00000012 0x00000001 0x00000060 0x00000013 0x00000001 0x00000060 0x00000014 0x00000001 0x00000060 0x00000015 0x00000001 0x00000060 0x00000016 0x00000001 0x00000060 0x00000017 0x00000001 0x00000060 0x00000018 0x00000001 0x00000060 0x00000019 0x00000001 0x00000060 0x0000001a 0x00000001 0x00000060 0x0000001b 0x00000001 0x00000060 0x0000001c 0x00000001 0x00000060 0x0000001d 0x00000001>; dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; phandle = <0x000000f6>; }; dma-controller@2000 { compatible = "ti,am3359-cppi41"; reg = <0x00000000 0x00001000 0x00002000 0x00001000 0x00003000 0x00001000 0x00004000 0x00004000>; reg-names = "glue", "controller", "scheduler", "queuemgr"; interrupts = <0x00000011>; interrupt-names = "glue"; #dma-cells = <0x00000002>; #dma-channels = <0x0000001e>; dma-channels = <0x0000001e>; #dma-requests = <0x00000100>; dma-requests = <0x00000100>; phandle = <0x00000060>; }; }; target-module@40300000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; clocks = <0x00000007 0x00000008 0x00000000>; clock-names = "fck"; ti,no-idle; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x40300000 0x00010000>; sram@0 { compatible = "mmio-sram"; reg = <0x00000000 0x00010000>; ranges = <0x00000000 0x00000000 0x00010000>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; phandle = <0x000000f7>; pm-code-sram@0 { compatible = "ti,sram"; reg = <0x00000000 0x00001000>; protect-exec; phandle = <0x00000047>; }; pm-data-sram@1000 { compatible = "ti,sram"; reg = <0x00001000 0x00001000>; pool; phandle = <0x00000048>; }; }; }; target-module@4c000000 { compatible = "ti,sysc-omap4-simple", "ti,sysc"; reg = <0x4c000000 0x00000004>; reg-names = "rev"; clocks = <0x00000007 0x00000004 0x00000000>; clock-names = "fck"; ti,no-idle; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x4c000000 0x01000000>; emif@0 { compatible = "ti,emif-am3352"; reg = <0x00000000 0x01000000>; interrupts = <0x00000065>; sram = <0x00000047 0x00000048>; phandle = <0x000000f8>; }; }; target-module@50000000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x50000000 0x00000004 0x50000010 0x00000004 0x50000014 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000039 0x00000014 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x50000000 0x50000000 0x00001000 0x00000000 0x00000000 0x40000000>; gpmc@50000000 { compatible = "ti,am3352-gpmc"; reg = <0x50000000 0x00002000>; interrupts = <0x00000064>; dmas = <0x00000024 0x00000034 0x00000000>; dma-names = "rxtx"; gpmc,num-cs = <0x00000007>; gpmc,num-waitpins = <0x00000002>; #address-cells = <0x00000002>; #size-cells = <0x00000001>; interrupt-controller; #interrupt-cells = <0x00000002>; gpio-controller; #gpio-cells = <0x00000002>; status = "disabled"; phandle = <0x000000f9>; }; }; target-module@53100000 { compatible = "ti,sysc-omap3-sham", "ti,sysc"; reg = <0x53100100 0x00000004 0x53100110 0x00000004 0x53100114 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000003>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; ti,syss-mask = <0x00000001>; clocks = <0x00000007 0x0000007c 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x53100000 0x00001000>; phandle = <0x000000fa>; sham@0 { compatible = "ti,omap4-sham"; reg = <0x00000000 0x00000200>; interrupts = <0x0000006d>; dmas = <0x00000024 0x00000024 0x00000000>; dma-names = "rx"; status = "okay"; phandle = <0x000000fb>; }; }; target-module@53500000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x53500080 0x00000004 0x53500084 0x00000004 0x53500088 0x00000004>; reg-names = "rev", "sysc", "syss"; ti,sysc-mask = <0x00000003>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002 0x00000003>; ti,syss-mask = <0x00000001>; clocks = <0x00000007 0x00000070 0x00000000>; clock-names = "fck"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x53500000 0x00001000>; phandle = <0x000000fc>; aes@0 { compatible = "ti,omap4-aes"; reg = <0x00000000 0x000000a0>; interrupts = <0x00000067>; dmas = <0x00000024 0x00000006 0x00000000 0x00000024 0x00000005 0x00000000>; dma-names = "tx", "rx"; status = "okay"; phandle = <0x000000fd>; }; }; target-module@56000000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x5600fe00 0x00000004 0x5600fe10 0x00000004>; reg-names = "rev", "sysc"; ti,sysc-midle = <0x00000000 0x00000001 0x00000002>; ti,sysc-sidle = <0x00000000 0x00000001 0x00000002>; clocks = <0x00000063 0x00000004 0x00000000>; clock-names = "fck"; power-domains = <0x00000064>; resets = <0x00000064 0x00000000>; reset-names = "rstctrl"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x56000000 0x01000000>; gpu@0 { compatible = "ti,am3352-sgx530", "img,sgx530"; reg = <0x00000000 0x00010000>; interrupts = <0x00000025>; phandle = <0x000000fe>; }; }; }; not_available { phandle = <0x000000ff>; }; memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; }; leds { pinctrl-names = "default"; pinctrl-0 = <0x00000065>; compatible = "gpio-leds"; led2 { label = "beaglebone:green:usr0"; gpios = <0x00000028 0x00000015 0x00000000>; linux,default-trigger = "heartbeat"; default-state = "off"; }; led3 { label = "beaglebone:green:usr1"; gpios = <0x00000028 0x00000016 0x00000000>; linux,default-trigger = "mmc0"; default-state = "off"; }; led4 { label = "beaglebone:green:usr2"; gpios = <0x00000028 0x00000017 0x00000000>; linux,default-trigger = "cpu0"; default-state = "off"; }; led5 { label = "beaglebone:green:usr3"; gpios = <0x00000028 0x00000018 0x00000000>; linux,default-trigger = "mmc1"; default-state = "off"; }; }; fixedregulator0 { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <0x00325aa0>; regulator-max-microvolt = <0x00325aa0>; phandle = <0x0000003e>; }; clk_mcasp0_fixed { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-frequency = <0x01770000>; phandle = <0x00000066>; }; clk_mcasp0 { #clock-cells = <0x00000000>; compatible = "gpio-gate-clock"; clocks = <0x00000066>; enable-gpios = <0x00000028 0x0000001b 0x00000000>; phandle = <0x00000069>; }; sound { compatible = "simple-audio-card"; simple-audio-card,name = "TI BeagleBone Black"; simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <0x00000067>; simple-audio-card,frame-master = <0x00000067>; simple-audio-card,cpu { sound-dai = <0x00000068>; clocks = <0x00000069>; phandle = <0x00000067>; }; simple-audio-card,codec { sound-dai = <0x0000006a>; }; }; __symbols__ { mpu_gate = "/cpus/idle-states/mpu_gate"; cpu0_opp_table = "/opp-table"; ocp = "/ocp"; l4_wkup = "/ocp/interconnect@44c00000"; wkup_m3 = "/ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0"; prcm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0"; prcm_clocks = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks"; clk_32768_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768"; clk_rc32k_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k"; virt_19200000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000"; virt_24000000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000"; virt_25000000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000"; virt_26000000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000"; tclkin_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin"; dpll_core_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490"; dpll_core_x2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2"; dpll_core_m4_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480"; dpll_core_m5_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484"; dpll_core_m6_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8"; dpll_mpu_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488"; dpll_mpu_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8"; dpll_ddr_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494"; dpll_ddr_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0"; dpll_ddr_m2_div2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2"; dpll_disp_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498"; dpll_disp_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4"; dpll_per_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c"; dpll_per_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac"; dpll_per_m2_div4_wkupdm_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm"; dpll_per_m2_div4_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4"; clk_24mhz = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz"; clkdiv32k_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k"; l3_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk"; pruss_ocp_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530"; mmu_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914"; timer1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528"; timer2_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508"; timer3_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c"; timer4_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510"; timer5_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518"; timer6_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c"; timer7_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504"; usbotg_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c"; dpll_core_m4_div2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2"; ieee5000_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4"; wdt1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538"; l4_rtc_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk"; l4hs_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk"; l3s_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk"; l4fw_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk"; l4ls_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk"; sysclk_div_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div"; cpsw_125mhz_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk"; cpsw_cpts_rft_clk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520"; gpio0_dbclk_mux_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c"; lcd_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534"; mmc_clk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc"; gfx_fclk_clksel_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel"; gfx_fck_div_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div"; sysclkout_pre_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre"; clkout2_div_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div"; clkout2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2"; prcm_clockdomains = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clockdomains"; per_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0"; l4ls_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38"; l3s_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c"; l3_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24"; l4hs_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120"; pruss_ocp_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8"; cpsw_125mhz_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0"; lcdc_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18"; clk_24mhz_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c"; wkup_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400"; l4_wkup_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0"; l3_aon_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14"; l4_wkup_aon_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0"; mpu_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600"; mpu_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0"; l4_rtc_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800"; l4_rtc_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0"; gfx_l3_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900"; gfx_l3_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0"; l4_cefuse_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00"; l4_cefuse_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0"; prm_per = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00"; prm_wkup = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00"; prm_mpu = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00"; prm_device = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00"; prm_rtc = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000"; prm_gfx = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100"; prm_cefuse = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200"; gpio0_target = "/ocp/interconnect@44c00000/segment@200000/target-module@7000"; gpio0 = "/ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0"; uart0 = "/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0"; i2c0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0"; tps = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24"; dcdc1_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@0"; dcdc2_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@1"; dcdc3_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@2"; ldo1_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@3"; ldo2_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@4"; ldo3_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@5"; ldo4_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@6"; baseboard_eeprom = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50"; baseboard_data = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50/baseboard_data@0"; tda19988 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70"; hdmi_0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70/ports/port@0/endpoint"; bone_adc = "/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0"; tscadc = "/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0"; am335x_adc = "/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/adc"; scm = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0"; bone_pinmux = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800"; am33xx_pinmux = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800"; bborg_comms_can_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_comms_can_pins"; bborg_comms_rs485_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_comms_rs485_pins"; user_leds_s0 = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/user-leds-s0-pins"; i2c0_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/i2c0-pins"; i2c2_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/i2c2-pins"; uart0_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/uart0-pins"; cpsw_default = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw-default-pins"; cpsw_sleep = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw-sleep-pins"; davinci_mdio_default = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci-mdio-default-pins"; davinci_mdio_sleep = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci-mdio-sleep-pins"; mmc1_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/mmc1-pins"; emmc_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/emmc-pins"; nxp_hdmi_bonelt_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/nxp-hdmi-bonelt-pins"; nxp_hdmi_bonelt_off_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/nxp-hdmi-bonelt-off-pins"; mcasp0_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/mcasp0-pins"; scm_conf = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0"; phy_gmii_sel = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel"; scm_clocks = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks"; sys_clkin_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40"; adc_tsc_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck"; dcan0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck"; dcan1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck"; mcasp0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck"; mcasp1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck"; smartreflex0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck"; smartreflex1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck"; sha0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck"; aes0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck"; rng_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck"; ehrpwm0_tbclk = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk"; ehrpwm1_tbclk = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk"; ehrpwm2_tbclk = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk"; usb_ctrl_mod = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620"; wkup_m3_ipc = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324"; edma_xbar = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90"; scm_clockdomains = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/clockdomains"; timer1_target = "/ocp/interconnect@44c00000/segment@200000/target-module@31000"; timer1 = "/ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0"; wdt2 = "/ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0"; rtc = "/ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0"; l4_per = "/ocp/interconnect@48000000"; uart1 = "/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0"; uart2 = "/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0"; i2c1 = "/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0"; spi0 = "/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0"; mcasp0 = "/ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0"; mcasp1 = "/ocp/interconnect@48000000/segment@0/target-module@3c000/mcasp@0"; timer2_target = "/ocp/interconnect@48000000/segment@0/target-module@40000"; timer2 = "/ocp/interconnect@48000000/segment@0/target-module@40000/timer@0"; timer3 = "/ocp/interconnect@48000000/segment@0/target-module@42000/timer@0"; timer4 = "/ocp/interconnect@48000000/segment@0/target-module@44000/timer@0"; timer5 = "/ocp/interconnect@48000000/segment@0/target-module@46000/timer@0"; timer6 = "/ocp/interconnect@48000000/segment@0/target-module@48000/timer@0"; timer7 = "/ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0"; gpio1 = "/ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0"; mmc1 = "/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0"; elm = "/ocp/interconnect@48000000/segment@0/target-module@80000/elm@0"; mailbox = "/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0"; mbox_wkupm3 = "/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0/mbox-wkup-m3"; hwspinlock = "/ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0"; i2c2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0"; cape_eeprom0 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54"; cape0_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54/cape_data@0"; cape_eeprom1 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55"; cape1_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55/cape_data@0"; cape_eeprom2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56"; cape2_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56/cape_data@0"; cape_eeprom3 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57"; cape3_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57/cape_data@0"; spi1 = "/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0"; uart3 = "/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0"; bone_uart_4 = "/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0"; uart4 = "/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0"; uart5 = "/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0"; gpio2 = "/ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0"; gpio3_target = "/ocp/interconnect@48000000/segment@100000/target-module@ae000"; gpio3 = "/ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0"; dcan0 = "/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0"; bone_can_1 = "/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0"; dcan1 = "/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0"; mmc2 = "/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0"; epwmss0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0"; ecap0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@100"; eqep0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/counter@180"; ehrpwm0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@200"; epwmss1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0"; ecap1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@100"; eqep1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/counter@180"; ehrpwm1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@200"; epwmss2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0"; ecap2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@100"; eqep2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/counter@180"; ehrpwm2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@200"; lcdc = "/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0"; lcdc_0 = "/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0/port/endpoint@0"; rng = "/ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0"; l4_fw = "/ocp/interconnect@47c00000"; l4_fast = "/ocp/interconnect@4a000000"; mac = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0"; davinci_mdio = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/mdio@1000"; cpsw_emac0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@200"; cpsw_emac1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@300"; mac_sw = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0"; cpsw_port1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1"; cpsw_port2 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2"; davinci_mdio_sw = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000"; ethphy0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000/ethernet-phy@0"; pruss_tm = "/ocp/interconnect@4a000000/segment@0/target-module@300000"; pruss = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0"; pruss_mem = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/memories@0"; pruss_cfg = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000"; pruss_iepclk_mux = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000/clocks/iepclk-mux@30"; pruss_uart = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/serial@28000"; pruss_mii_rt = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000"; pruss_intc = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000"; pru0 = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000"; pru1 = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000"; pruss_mdio = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mdio@32400"; l4_mpuss = "/ocp/interconnect@4b140000"; intc = "/ocp/interrupt-controller@48200000"; edma = "/ocp/target-module@49000000/dma@0"; edma_tptc0 = "/ocp/target-module@49800000/dma@0"; edma_tptc1 = "/ocp/target-module@49900000/dma@0"; edma_tptc2 = "/ocp/target-module@49a00000/dma@0"; mmc3 = "/ocp/target-module@47810000/mmc@0"; usb = "/ocp/target-module@47400000"; usb0_phy = "/ocp/target-module@47400000/usb-phy@1300"; usb0 = "/ocp/target-module@47400000/usb@1400"; usb1_phy = "/ocp/target-module@47400000/usb-phy@1b00"; usb1 = "/ocp/target-module@47400000/usb@1800"; cppi41dma = "/ocp/target-module@47400000/dma-controller@2000"; ocmcram = "/ocp/target-module@40300000/sram@0"; pm_sram_code = "/ocp/target-module@40300000/sram@0/pm-code-sram@0"; pm_sram_data = "/ocp/target-module@40300000/sram@0/pm-data-sram@1000"; emif = "/ocp/target-module@4c000000/emif@0"; gpmc = "/ocp/target-module@50000000/gpmc@50000000"; sham_target = "/ocp/target-module@53100000"; sham = "/ocp/target-module@53100000/sham@0"; aes_target = "/ocp/target-module@53500000"; aes = "/ocp/target-module@53500000/aes@0"; gpu = "/ocp/target-module@56000000/gpu@0"; not_available = "/not_available"; vmmcsd_fixed = "/fixedregulator0"; clk_mcasp0_fixed = "/clk_mcasp0_fixed"; clk_mcasp0 = "/clk_mcasp0"; dailink0_master = "/sound/simple-audio-card,cpu"; }; };