Does anyone have an electrical model/schematic for the Beaglebone ADC inputs? Can anyone point me to the absolute max/recommended operating conditions for these inputs in the data sheet or elsewhere? I’ve looked, but can’t seem to find the data, although I suspect that it’s there somewhere!
I understand that the design nominal is 1.8V given the subsystem’s supply voltage, but am concerned about transients which may exceed this, or drop below 0V.The data sheet, p. 79, “Steady State Max Voltage at all I/O Pins” says that the limits are -0.5V to supply voltage + 0.3V. Given that the ADC supply (nominal) is 1.8 volts, wouldn’t this place the min. and max at -0.5 to 2.1V? What is the current limit on the ADC pins within these limits? Is there anywhere I should look to get some insight into the actual ADC input circuitry re. input protection and configuration?
Transients are a concern and should not be allowed. Current limit is low. These ports were designed as touch screen inputs, so there is a high impedance on these input,
For ADC power supply, the AM335x datasheet lists VDDA_ADC recommended operating range as 1.8v +/- 5% (Table 3-12), and absolute max as 2.1v (Table 3-1).
For ADC signals inputs, the max range is listed as 0-VDDA_ADC (Table 3-17), so it should not exceed the input power supply level. No tolerance is given!
I have rev F of the document (Apr 2013), table numbers may have changed in later revs.
Thank you again for the inputs. Would still really, really like to get a peek at the input protection (if any, ESD or otherwise) provided on the ADC pins as the only sure way of feeling comfortable with this. I understand that the ADC inputs are high impedance within the recommended operating region, but are you saying that these pins feed directly into an unprotected FET gate or something of that sort?
I’m using the AM335x data sheet SPRS717G revised June, 2014 and find the following in table 5-1, p. 79:
“Steady State Max. Voltage at all IO pins(8) -0.5V to IO supply voltage + 0.3 V”
also
“Transient Overshoot and Undershoot specification at IO terminal — 25% of corresponding IO supply voltage for up to 30% of
signal period”
I think I’m hearing you say that the ADC inputs don’t qualify as “IO pins” here though – so I’m at something of a loss. The “steady state max. voltage” spec seems to imply some sort of diode clamping.
And the 1.8V issue aside, what happens if an ADC pin goes below ground for a short period? Poof?
Agree that it would be best to ban transients altogether, but I haven’t found a way to do that here yet
I want to use three of the ADC channels in a bipolar mode covering up to +/- 12V, and I have a front-end design that allows this with easy range adjustment and an adjustable degree of “protect the processor” paranoia. As with zener limiting though, there are tradeoffs between channel protection, achievable resolution, linearity and sampling rate .
In the limit, I could use a four-diode opamp limiter to guarantee ADC input limits of 0 - 1.80 volts – but even then I’d have some uncertainty with respect to possible temperature and transient effects – and the solution would be relatively expensive.
.I guess I’m just trying to get enough information about the ADC inputs to make the resluiton/protection/linearity/speed tradeoffs based on reason rather than fear Its looking like I may have to just guess though.