Additional CS for SPI0 Beagle Bone Black Wireless

General Discussion
1

Hi there!

I am using the SPI0 bus (using SPIDEV) for an application and want to use the P9_12 as an additional chip select in the Beagle Bone Black Wireless. I have changed the universal-cape-00A0.dts file to include an option to configure p9.12 as spi_cs. However, whenever I want to run the program the pin does not work as a chip select.

2

Hi

are you shure P9_12 as CS pin ?
http://exploringbeaglebone.com/wp-content/uploads/resources/BBBP9Header.pdf

3

Hello,

That is correct.

The highlighted items in the table you shared are the pins set up for SPI1, however, I need to use SPI0 which is in pins P9.17, P9.18, P9.21, and P9.22.

According to other forums one can set gpios as an “spi_cs” in SPI0 to have additional slaves. I want to understand how to that.

4

You can set other gpio’s as a spi_cs, but you need to update your device tree…

While you are using P9_12… Here’s an example of using P8_10 as spi_cs for spi1, so adjust accordinly:

Needs to be mode 7 gpio:

AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7 ) /* P8_10 (U6) gpmc_wen.gpio2_4 */

update the spi1 node with a new cs-gpio:

cs-gpios = <0>, <0>, <&gpio2 4 GPIO_ACTIVE_HIGH>;

Then adjust the device node:

w5500: ethernet@2 {

Here’s the full example… (adjust for P9_12)…

Regards,

1 Like
5

Hi Thank you so much!

Do you know which files I need to change for SPI0, the file provided is for SPI1 I really need to get this working for SPI0.

6

Grab any of the BB-SPI0-* examples here and add your new cs…

Regards,

7

Hi Robert,

This approach did not work for me. Is there a specific file that one has to use? Or does any file work?

I compiled it and moved the dtbo file to the /lib/firmware folder and rebooted the system. Is this what had to be done?

I have also added it to the uEnv.tct file and it did not work.

Can I use p9.17 at the same time I am using other Chip selects? (I’ve read that you should not use p9.17 if you are using other chip selects, just wanted to confirm)

8

Please share which pins you are using, can we assume the spidev driver?

Regards,

9

Hi Robert,

Yes, you can assume SPIDEV.

I am using SPI0 which are the pins P9.17, P9.18, P9.21, and p9.22.

I want an additional chip select pin using P9.12. If P9.17 cannot be used at the same time as using gpios chip selects then I am looking to use P9.15 as chip select.

Best regards

10

Hi Robert,

Have you’ve been able to find if it works? I have tried different approaches.

Best regards,
Lianne

11

Something like this should work…

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>
#include <dt-bindings/interrupt-controller/irq.h>

/*
 * Free up the pins used by the cape from the pinmux helpers.
 */
&ocp {
	P9_17_pinmux { status = "disabled"; };	/* P9_17 (A16) spi0_cs0.spi0_cs0 */
	P9_18_pinmux { status = "disabled"; };	/* P9_18 (B16) spi0_d1.spi0_d1 */
	P9_21_pinmux { status = "disabled"; };	/* P9_21 (B17) spi0_d0.spi0_d0 */
	P9_22_pinmux { status = "disabled"; };	/* P9_22 (A17) spi0_sclk.spi0_sclk */
	P9_12_pinmux { status = "disabled"; };
};

&am33xx_pinmux {
	bb_spi0_pins: pinmux_bb_spi0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)	/* P9_22 (A17) spi0_sclk.spi0_sclk */
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT, MUX_MODE0)	/* P9_21 (B17) spi0_d0.spi0_d0 */
			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)	/* P9_18 (B16) spi0_d1.spi0_d1 */
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE0)	/* P9_17 (A16) spi0_cs0.spi0_cs0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT | MUX_MODE7)	/* P9.12 */
		>;
	};
};

&spi0 {
	#address-cells = <1>;
	#size-cells = <0>;

	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&bb_spi0_pins>;
	cs-gpios = <0>, <0>, <&gpio1 28 GPIO_ACTIVE_HIGH>;

	channel@2 {
		#address-cells = <1>;
		#size-cells = <0>;

		compatible = "rohm,dh2228fv";

		reg = <0x2>;
		spi-max-frequency = <16000000>;
	};
};
12

Hi Robert,

It is really not working for me. I am not sure what I am doing wrong.

Best regards,
Lianne

13

Hi Robert!

Which version of debian are you using? (Where that code works)

Best,
Lianne

14

Lianne, did you ever find a solution to this?
I’m now also trying to set up an extra CS pin on SPI (SPI1 instead of SPI0 unlike you) and I haven’t been successful with Robert’s instructions here.

I wonder if there’s any way to check that the device tree overlay worked as expected? I.e., if I use pin-config -l <my pin> should I expect to see SPI as an option?

15

Hi I have same problem with my BB.
I use SPI0 with CS0 P9.17 for control a ADC. It work vary well.
I want 3 additional chip select pin using P9.15, P9.13 and P9.11. Another 3 ADC, one CS each.
If P9.17 cannot be used at the same time as using gpios chip selects then I am looking to use P9.15 as chip select.
Does anyone have a solution to this problem?
I need to command four identical ADCs that I have on the board, all with SPI0 and each with its Chip Select.

Best regards