Are there any plans for placing WiFi chips on the Pocket Beagle 2? I remember seeing a couple posts about some individuals utilizing some WiFi chips on the Pocket Beagle 2 and I wanted to find out if they would be available in future configurations already soldered/baked.
If so, YAY! If not, not big deal. I can always add to the building blocks of my life by learning how to incorporate that WiFi chip into the PB2 maybe.
Seth
P.S. Speaking to a general audience here, what exact chipset fits on the Pocket Beagle 2 for WiFi chips? In the meantime, I can research the docs. and find a ball footprint (hopefully).
Is there a click board that does it? Iirc the pb2 still takes click boards … Hmmm can’t find the link for that so maybe I imagining it. Anyway still think that the header pins is the way to do it, just a question of it there is any off the shelf solution. Search some more, yes some click boards at least are provided, not sure if it has the right connections for all boards.
Looked into this over breakfast. The mikro click boards plug into the inner two rows of pb/pb2. The Wi-Fi cards seem to have wired spi and uart connections. That’s slightly odd to my mind, most Wi-Fi boards these day are m2 E key, 2230 (I’ve a odd half mini pcie board on my old bay trail device). But of course the headers on the pb/pb2 are set up as gpio/uart/i2c/spi pins, they aren’t set up on an m2 pcie set up. RPi latest boards also go the way of m2, as beagles develop I guess they will, and maybe connectors for emmc boards (like odroid and radxa). Anyway we aren’t there yet, so guess pb/pb2 is forced to go the spi/uart direction for Wi-Fi.
Yes there are Wi-Fi click boards, but quite expensive, and I worry about going over the spi interface. I thought I could recall that pb2 pins could be configured as usb or Ethernet - but hazy in my mind though, shall have to look it up, and then see what hardware and overlays are needed. To me it doesn’t sound great. Checked the TRM, there are two Ethernet and two usb2.0 out of the cpu. Need to check if they come out on the header. Suggests to me that usb may be better (faster/cheaper) than spi. Max USB to speed is 480mbps.
the two USB, one is the USB-C and the other is on P1 header
the Ethernet are the RMII and RGMII, there have been people here recently working on getting these working. time will only tell if capes become available.
as for spi, wiz850io module gets about 9.5M/bit baudrate.
I looked into usb 2.0 vs SPI. The usb should be faster, although both signals go on the same wires (point to point serial connection). Still using the usb hardware in the cpu should be better. Wi-Fi over SPI is unusual, quick Google and couldn’t see any standards here, or simple plug and play solution on linux. The problem with click boards is their bus is by specification SPI and uart only (probably the uart is 3.3V - but I haven’t checked if that is the spec, or just the spec says 5.0V and 3.3V tollerant). Adafruit offers many Wi-Fi solutions, most with an esp32 processor on there, that’s cheaper than the click boards; there are some boards that are just the Wi-Fi chip (SPI the ones I looked at). I’d be tempted just to buy a cheap usb to Wi-Fi board with headers from aliexpress, then do it with jumpers to the pb2. This wouldn’t be pretty. If you want a pretty solution, maybe design circuit board that will fit in the pb2 headers, then get pcbway to manfacture. I’d suggest something like a TI chip, just because the TI documentation is good, and will tell you how to wire the board. Looks like the ones to look for on aliexpress are the realtek boards, can’t see one with headers on the board, so a bit more hassle.
Are there cape that do the outside rows of the headers? I could only see USB on the outside pins, and the click board plug into the inside pins. So it has to be a more general cape than the click boards.
I was thinking the missing chip on the Pocket Beagle 2 was wifi and not an eMMC chip.
My error completely. I found out later, after error on past thoughts without current research, the missing chip is an eMMC and not a wifi chip.
So, again. My error here. I thought I changed the header to this question.
Working in the dark as usual is NOT productive. I need to find time during the days to handle such a serious issue of a technicality.
On a lighter note here, my BOBs (breakout boards) with the chips from TI arrived.
TXS0102D and
TXS0108E
To @amf99 , thank you for this data and even though I had to pay extra instead of mfg. the circuit, which can be challenging at times for me, I just need to solder the header pins on them now. Phew…
Yes trade-off is between putting a proper usb2.0 header on the PB2 pins - and then using a standard USB to WiFi solution. I had in mind can one get the usb to 802.11 on a small pcb - then do do jumpers into the PB2 pins. Had in mind based on something like this: https://www.ti.com/pdfs/bcg/tnetw1450_prod_bulletin.pdf . Out of interest why are you looking at level convertors? The USB data voltage is 3.3V which is what I expect the PB2 has on its pins, and expect the bins have enough current for communication. The 5V line in the USB power - isn’t there a 5V pin on the PB2?
Went through the TI docs on that evaluation board - and its clear they are bringing up an SDIO / 2 wire / UART interface - I’ll dig some more to see if there is a usb device. Anyway the document is interesting in that it shows mounting the board on a BBB! Ah - the output of the modern TI WiFi chips is SPI style but technically SDIO as it has 4 data lines. Hmm wonder how to connect that, to PB2. Needs some though on if the GPIO pins are fast enough, or if the AM6254 has dedicated electronics for doing 4 channel SDIO, and if that is pinned out on the PB2. Woah - and just realised that the eMMC socket is SDIO, so what the TI WiFi chip uses. So in a bizarre twist the original post was was very insightful!
OK - this is a rabbit hole thats taken several hours. The AM625x does have fast SDIO lanes, its what is used for the eMMC and flash. SDIO0 which has 8 data lines goes to the unmounted eMMC headers that has already been mentioned. SDIO1 goes to the sD card, its only four data lines. SDIO2 is also 4 lanes, I lived in hope that they went to the headers - but just looks like they are all not connected. This is a huge pity, if they were its just a change to a device tree (in an overlay) and a single TI chip on a simple board, and there should be working hardware. As it is and it looks hard to get a capable wifi chip into the board. I suppose though if there is ever a PB2W board, (with WiFI) it should be simple to design, as there are free pins for it - and it looks like its not much more than one extra chip.
On the board there are rather Vout pins, which are, when power is supplied via USB/VIN(5V), slightly lower than 5V due to voltage drop (many low power devices still can use it), If your board is supplied via Vbat such pins obviously are not 5V, but whatever battery has right now.
This is useful reading. So you can use spi or uart or 4 data sdio. The sdio is the fast connection, the others will just be slower. Should be able to get each to work with a device free overlay. I think the best bet is to convince @RobertCNelson to do a pb2w in the future, with a dual frequency chip wired into sdio2, 4 data lines, and two of those very small Wi-Fi antenna connectors on the board. https://www.ti.com/lit/an/swra779/swra779.pdf
At this point I’m time, I do not like the cc33xx situation. It was submitted as an rfc to mainline a few years ago, yet it’s been completely ignored since.
So IDK, personally been exploring some of the esp32 hosted options for my personal use cases.
Hi @RobertCNelson what’s the problem with the cc33xx chips? Is it just that it was suggested, but no one has done the leg work needed? If so I can understand. Guess then the solution for low bandwidth Wi-Fi the simple solution is just to use spi and uart on a click board. Then a simple device tree overlay, with configuration over uart and data over spi, I guess should work simply. The low bandwidth coming from the single spi data IO link, and the speed that the spi is run at.