I guess it is related to memory mapping but not event sure!
I am using /usr/share/ti/cgt-c6x/lib/rts64plus_elf.lib library from ti-c6000-cgt-v8.3 package
When you built, did you create a .map file? As I understand, the DSP code is statically linked with hard memory addresses. I think the tools should be able to give you a .map file to show where things are linked. Also, if you can share the whole project with build files, that might make it easier for people to know what is going wrong.
Indeed I have a map file. I just managed to make this example work but it is by complete guess/chance.
As stated in the file’s comment, I took inspiration from other TI files. I have read also lots of documentation on TDA4V’s memory and such, yet could not find how to get the actual memory configuration (as for example MSMC memory could be configured).
NB: I am working and compiling directly from the BBAI64 as per out of the box.
So I have read in details and done some drawing of the memory map. Basically, in my working example, everything goes into the C66 COREPAC RAT REGION.
Which tool could give me the .map file? I run everything on the board itself and I am discovering the TI way of doing it… The whole project consist only of the shared Makefile, no CCS involved or whatever.
I guess now I need to find out how is the Region-based Address translation (RAT) configured to better understand why some address are invalid.