Hi.
UART-1, UART-5 has been activated through overlays operation.
edited /boot/firmware/extlinux/extlinux.conf
“fdtoverlays /overlays/BONE-UART1.dtbo /overlays/BONE-UART5dtbo”
UBOOT: Booted Device-Tree:[k3-j721e-beagleboneai64.dts]
UBOOT: Loaded Overlay:[BBAI64-CSI0-imx219.kernel]
UBOOT: Loaded Overlay:[BONE-I2C1.kernel]
UBOOT: Loaded Overlay:[BONE-UART1.kernel]
UBOOT: Loaded Overlay:[BONE-UART5.kernel]
kernel:[5.10.153-ti-arm64-r84]
debian@BeagleBone:~$ ls /dev/bone/uart
0 1 5
I want to use five UART Serials and don’t know what to do to use more UART serial.
Hi @ALEX_PARK those were just the first uart’s i got physically working… I need to go back thru the list now that more of the peripheral clock and power have been enabled on the core.
Regards,
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Thankyou @RobertCNelson. Successed five UART open.
‘k3-j721e-beagleboneai64.dts’ was modified and succeeded.
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Do you know where I can get a copy of the overlays? I did a git pull to my /opt/source/dtb-5.10-ti and it is up to date. I have only one UART overlay and it is for UART1. Also what other changes are required.
$ sudo beagle-version | grep UBOOT
UBOOT: Booted Device-Tree:[k3-j721e-beagleboneai64.dts]
UBOOT: Loaded Overlay:[BONE-PWM0.kernel]
UBOOT: Loaded Overlay:[BONE-PWM1.kernel]
UBOOT: Loaded Overlay:[BONE-PWM2.kernel]
I tried to add the BONE-UART1.dtbo to the extlinux.conf. I then copied the BONE-UART1.dtbo to the /boot/dtbs/5.10.153-ti-arm64-r86.ti.overlays folder. The reboot failed, so I removed the line in the extlinux.conf that I just added for BONE-UART1.dtbo. I have noticed that their is no fragment for main_uart1 or main_uart2, in the k3-j721e-beagleboardai64.dts. Also uart3, uart6, uart7, uart8, and uart9 have status=“disabled”.
$ cat /opt/source/dtb-5.10-ti/src/arm64/k3-j721e-beagleboneai64.dts
main_uart0_pins_default: main-uart0-pins-default {
&wkup_uart0 {
&main_uart0 {
pinctrl-0 = <&main_uart0_pins_default>;
&main_uart3 {
&main_uart6 {
&main_uart7 {
&main_uart8 {
&main_uart9 {
BONE-UART1 on the expansion header is $main_uart2 on bbai64 soc. Beagleboard:BeagleBone cape interface spec - eLinux.org
Regards,
I actived five uart port.
I modified ‘k3-j721e-beagleboneai64-bone-buses.dtsi’
bone_uart_3: &main_uart3 {
/* tested /
pinctrl-names = “default”;
pinctrl-0 = <
&P9_17_uart_pin / uart3_txd /
&P9_12_uart_pin / uart3_rxd */
;
symlink = “bone/uart/3”;
status = “okay”;
};
A similar correction would do.
I referred to the pin map [Connectors — BeagleBoard Documentation]
/home/pops/opt/source/dtb-5.10-ti/src/arm64/k3-j721e-beagleboneai64.dts did you change:
from:
&main_uart3 {
/* UART not brought out /
status = “disabled”;
};
to:
&main_uart3 {
/ UART not brought out */
status = “okay”;
};
Having trouble getting enough UARTS. I was successfull getting UART1 functioning. So I tried to get UART5 to function by modifying “k3-j721e-beagleboneai64-bone-buses.dtsi” as follows:
bone_uart_5: &main_uart5 {
pinctrl-names = “default”;
pinctrl-0 = <
&P8_37_uart_pin /* uart2_txd /
&P8_38_uart_pin / uart2_rxd */
>;
symlink = “bone/uart/5”;
status = “disabled”;
};
Then created an overlay by modifying “BONE-UART1.dts” as follows:
// SPDX-License-Identifier: GPL-2.0
/*
/dts-v1/;
/plugin/;
/*
- Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
*/
&{/chosen} {
overlays {
BONE-UART5.kernel = TIMESTAMP;
};
};
&bone_uart_5 {
status = “okay”;
};
Then recompiled source files followed by a " make install_arm64" and added the overlay to the “extlinux.conf” file.
model:[BeagleBoard.org_BeagleBone_AI-64]
dogtag:[BeagleBoard.org Debian Bullseye Xfce Image 2023-02-05]
bootloader:[/dev/mmcblk0boot0]:[tiboot3.bin]:[U-Boot SPL 2021.01-gc21ddbdf (Nov 28 2022 - 15:42:44 +0000)]
bootloader:[/dev/mmcblk0]:[/boot/firmware/tiboot3.bin]:[U-Boot SPL 2021.01-gc21ddbdf (Nov 28 2022 - 15:42:44 +0000)]
bootloader:[/dev/mmcblk0]:[/boot/firmware/tispl.bin]:[U-Boot SPL 2021.01-gc21ddbdf (Nov 28 2022 - 15:42:44 +0000)]
bootloader:[/dev/mmcblk0]:[/boot/firmware/u-boot.img]:[U-Boot 2021.01-gc21ddbdf (Nov 28 2022 - 15:42:44 +0000)]
bootloader:[/dev/mmcblk1]:[/boot/firmware/tiboot3.bin]:[U-Boot SPL 2021.01-gc21ddbdf (Nov 28 2022 - 15:42:44 +0000)]
bootloader:[/dev/mmcblk1]:[/boot/firmware/tispl.bin]:[U-Boot SPL 2021.01-gc21ddbdf (Nov 28 2022 - 15:42:44 +0000)]
bootloader:[/dev/mmcblk1]:[/boot/firmware/u-boot.img]:[U-Boot 2021.01-gc21ddbdf (Nov 28 2022 - 15:42:44 +0000)]
UBOOT: Booted Device-Tree:[k3-j721e-beagleboneai64.dts]
UBOOT: Loaded Overlay:[BONE-PWM0.kernel]
UBOOT: Loaded Overlay:[BONE-PWM1.kernel]
UBOOT: Loaded Overlay:[BONE-UART1.kernel]
kernel:[5.10.153-ti-arm64-r86]
I modified the ‘k3-j721e-beagleboneai64.dts’ and ‘k3-j721e-beagleboneai64-bone-buses.dtsi’ to use without adding OVERLAYS.
.dtsi file that is included by .dts
(k3-j721e-beagleboneai64.dts is also the file that BB AI-64 loads when it first boots.)
first. ( ‘k3-j721e-beagleboneai64-bone-buses.dtsi’ )
Check the expantion header pin, verify the correct pin number, and add or modify it.
BONE_PIN(P9_40, uart, P9_40B(PIN_INPUT, 14)) /* uart2_rxd */
bone_uart_4: &main_uart4 {
/* tested */
pinctrl-names = "default";
pinctrl-0 = <
&P9_38_uart_pin /* uart4_txd */
&P9_37_uart_pin /* uart4_rxd */
>;
symlink = "bone/uart/4";
status = "okay";
};
second. (k3-j721e-beagleboneai64.dts)
To enable the ports modified by dtsi, I deleted the disable contents of dts.
&main_uart4 {
/* UART not brought out */
status = "disabled";
};
Still a little confused. In my “k3-j721e-beagleboneAI64-bone-buses.dtsi” the association is as shown for P9_40 in your reply. Are you saying add the following to P9_38 and P9_39 respectively:
BONE_PIN(P9_37, uart, P9_37B(PIN_OUTPUT, 14)) /* uart4_txd /
BONE_PIN(P9_38, uart, P9_38B(PIN_INPUT, 14)) / uart4_rxd */
Do you have any explanation of why my UART5 attempt didn’t work? I may have messed up the comments for my pinctrl-0 but to late now to know since I had to restore my image.
I also don’t have a clue as to the association to “symlnk = /dev/bone/uart/4” gets a link to a certain
/dev/ttySX.
Got this working as “bone_uart_5” which maps to /dev/ttyS7. The corrected
“k3-j7221e-beagleboneai64-bone-buses.dtsi” is as follows:
bone_uart_5: &main_uart5 {
pinctrl-names = “default”;
pinctrl-0 = <
&P8_37_uart_pin /* uart2_txd /
&P8_38_uart_pin / uart2_rxd */
>;
symlink = “bone/uart/5”;
status = “okay”;
};
Per Alex Park I changed the status to “okay” from “disabled” which doesn’t require an extlinux overlay.
I have got 2 UART’s working without overlays by modifying “k3-j721e-beagleboneai64-bone-buses.dtsi” as follows:
bone_uart_2: &main_uart2 {
/* tested with sudo agetty 115200 ttyS4 /
pinctrl-names = “default”;
pinctrl-0 = <
&P9_24_uart_pin / uart2_txd /
&P9_26_uart_pin / uart2_rxd */
>;
symlink = “bone/uart/2”;
status = “okay”;
};
bone_uart_3: &main_uart5 {
pinctrl-names = “default”;
pinctrl-0 = <
&P8_37_uart_pin /* uart5_txd /
&P8_38_uart_pin / uart5_rxd */
>;
symlink = “bone/uart/3”;
status = “okay”;
};
The results is:
$ ls -al /dev/bone/uart
total 0
drwxr-xr-x 2 root root 100 Jan 1 1970 .
drwxr-xr-x 4 root root 80 Feb 18 17:00 …
lrwxrwxrwx 1 root root 11 Aug 7 2022 0 → …/…/ttyS2
lrwxrwxrwx 1 root root 11 Aug 7 2022 2 → …/…/ttyS4
lrwxrwxrwx 1 root root 11 Aug 7 2022 3 → …/…/ttyS7
I have tried the P8_17, 18 and P8_28,29, P8_31,32 with no sucess, I need a total of 3 uarts, 1 for XBEE, IMU, and GPS.
Added the following to “k3-j721e-beaglebone-bone-buses.dtsi” but still can’t get uart4 to work.
BONE_PIN(P9_37, uart, P9_37B(PIN_INPUT,14)) /* Added: uart4_rxd */
BONE_PIN(P9_38, uart, P9_38B(PIN_OUTPUT, 14)) / * Added: uart4_txd */
bone_uart_4: &main_uart4 {
/* does not work /
pinctrl-names = “default”;
pinctrl-0 = <
&P9_38_uart_pin / uart4_txd /
&P9_37_uart_pin / uart4_rxd */
>;
symlink = “bone/uart/4”;
status = “okay”;
};
$ ls -al /dev/bone/uart
total 0
drwxr-xr-x 2 root root 140 Jan 1 1970 .
drwxr-xr-x 4 root root 80 Feb 22 14:04 …
lrwxrwxrwx 1 root root 11 Aug 7 2022 0 → …/…/ttyS2
lrwxrwxrwx 1 root root 11 Aug 7 2022 1 → …/…/ttyS3
lrwxrwxrwx 1 root root 11 Aug 7 2022 2 → …/…/ttyS4
lrwxrwxrwx 1 root root 11 Aug 7 2022 4 → …/…/ttyS6
lrwxrwxrwx 1 root root 11 Aug 7 2022 2 → …/…/ttyS4
Finally got 4 UARTS working: main_uart3, main_uart5, plus main_uart0, and main_uart1. Created overlays BONE-UART3.dts and BONE_UART5.dts as bone_uart_3 and bone_uart_5 respectively. To get uart3 working I changed P9_17 to P9_27. Uart5 uses P9_38 and P9_37.
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