Hey all,
Since so many folks on this list have been involved with the development of my
BeagleBoard DAQ design in one way or another, I thought I might drop a line and
give a brief status update. Perhaps the most important point is that... well,
it works!
The scope in front of me is currently showing a beautiful sine wave produced by
the board's DAC, which I can then measure back with the ADCs. The fact that
this board's ICs are still functional after being over-driven/shorted/tortured
as much as they have is truly remarkable.
The design had a few issues which I over-looked (one quite serious), but after
a little reworking, the board works perfectly. I definitely intend on doing a
second revision of this design, probably even starting from scratch as this
design has a lot of cruft in it from old production constraints.
The design has something of a website[1], and the designs are available under
the GPL (in Eagle format). Anyways, I'll let you know when the second version
is ready. I'm hoping it will be much cleaner/cheaper/faster/more reliable/lower
noise/etc.
Lastly, I'd like to thank everyone who's contributed. I'd still be staring at a
pile of silicon and copper if it weren't for the folks in the community. Thanks!
- Ben
[1] http://goldnerlab.physics.umass.edu/wiki/BeagleBoardDaq
Congrats Ben,
I will be keenly interested once I get
my stuff done. The only thing I require
from the BB is a working SPI port. I've
done everything I can do for free, the
rest has to wait for funding. Since my
PLC will want analog outs and ins, I'm
glad you did the heavy lifting:^)
Regards
cww
Ben Gamari wrote:
Hi Ben
I forgot to ask, what kind of speed are you seeing
with your setup? That is, how many conversions per
second? And are you setting the analog mux between
readings? I'm looking at ADCs and it seems you need
a fairly high conversion rate (spendy) to keep the
SPI bus speed high. The commodity ADCs seem to top
out about 200ksps.
Regards
cww
Ben Gamari wrote:
Hi Ben
Hey,
I forgot to ask, what kind of speed are you seeing with your setup? That is,
how many conversions per second?
On the order of kilohertz. Faster would be nice, but by no means necessary.
And are you setting the analog mux between readings?
The current design doesn't actually use a mux. We have three devices (1 DAC, 2
ADCs), thus we fit within the 3 CS limit set by the BeagleBoard. This could be
an issue in the future though. I've heard[1] that the OMAP's GPIO controller is
not too quick (4 MHz), but for our current requirements that shouldn't be an issue.
I'm looking at ADCs and it seems you need a fairly high conversion rate
(spendy) to keep the SPI bus speed high. The commodity ADCs seem to top out
about 200ksps.
Well, it depends upon what you want to use. Just looking at TI's offerings, it
seems that they have plenty of >100 MSPS 14-bit converters, although that sort of
resolution definitely comes at a premium ($180/unit, in QFN package).
Apparently these units have parallel, SPI, and LVDS (!) interfaces, but I can't
imagine you could get anywhere near the chip's full capacity over SPI (at least
not with the McSPI controller). I think you'd need to use some dedicated logic
to buffer samples coming from the chip if you really needed >100 MSPS.
Cheers,
- Ben
[1] 78d70b17-3add-46fa-9f5e-eea47767d454@k19g2000yqc.googlegroups.com