Beagleboard PER Domain Transition issue

Hi,

We are trying to reduce the power consumption of the beagleboad-xm running Armstrong distribution v3.2.8 in sleep mode. During the process we find that the PER power domain is not transiting to the power state even though the debug print reports that the target transition is successful.

echo mem > /sys/power/state

[ 38.157618] PM: Syncing filesystems … done.
[ 40.863267] Freezing user space processes … (elapsed 0.01 seconds) done.
[ 40.890220] Freezing remaining freezable tasks … (elapsed 0.01 seconds) done.
[ 40.911680] Suspending console(s) (use no_console_suspend to debug)
[ 41.081522] PM: suspend of devices complete after 161.699 msecs
[ 41.083772] PM: late suspend of devices complete after 2.216 msecs
[ 45.672512] Successfully put all powerdomains to target state
[ 45.673972] PM: early resume of devices complete after 1.215 msecs
[ 46.053797] PM: resume of devices complete after 378.745 msecs
[ 46.159459] Restarting tasks … done.

cat count

usbhost_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
sgx_pwrdm (OFF),OFF:1,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
core_pwrdm (ON),OFF:0,RET:1,INA:0,ON:2,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0,RET-MEMBANK2-OFF:0
per_pwrdm (ON),OFF:0,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
dss_pwrdm (ON),OFF:0,RET:1,INA:0,ON:2,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
cam_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
neon_pwrdm (ON),OFF:0,RET:1,INA:0,ON:2,RET-LOGIC-OFF:0
mpu_pwrdm (ON),OFF:0,RET:1,INA:0,ON:2,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
iva2_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0,RET-MEMBANK2-OFF:0,RET-MEMBANK3-OFF:0,RET-MEMBANK4-OFF:0
usbhost_clkdm->usbhost_pwrdm (0)
sgx_clkdm->sgx_pwrdm (0)
per_clkdm->per_pwrdm (23)
cam_clkdm->cam_pwrdm (0)
dss_clkdm->dss_pwrdm (1)
core_l4_clkdm->core_pwrdm (22)
core_l3_clkdm->core_pwrdm (4)
d2d_clkdm->core_pwrdm (0)
iva2_clkdm->iva2_pwrdm (0)
neon_clkdm->neon_pwrdm (0)
mpu_clkdm->mpu_pwrdm (0)
prm_clkdm->wkup_pwrdm (0)
cm_clkdm->core_pwrdm (0)

All the latest PM patches seems to be available in the kernel source. The CORE domain is moving to RET whereas PER remains ON. Is this due to multiple dependencies on the clock domain? Or are we missing some thing? Any help will be appreciated.
Thanks and Regards,
SASP