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Beaglebone variant using a DP3867 IC for Ethernet.
1 post by 1 author
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BeagleBoard.org BeagleBone Black
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| me (Ray Willis change) |
Feb 14
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All,
I am working on a Prototype Dev board. We used a BeaglBone Black, then the Octavo RED, as Proof of Concepts to develop software for a prototype system. We are using Octavo’s OSD3358-SM which is a nice SIP. I have everything working on our prototype…except Ethernet.
A Staff Electrical Engineer designed the board…no one is perfect, but it leaves me to believe that it has something to do with my configuration.
OS= BBB-debian-9.9-lxqt-armhf-2019-08-03.
Dev Laptop: Linux Mint.
I developed my own overlay by editing Octavo’s, see below:
`
/dts-v1/;
#include “osd335x-sm.dtsi”
#include <dt-bindings/display/tda998x.h>
/ {
leds {
pinctrl-names = “default”, “sleep”;
pinctrl-0 = <&user_leds_default>;
pinctrl-1 = <&user_leds_sleep>;
compatible = “gpio-leds”;
led@2 {
label = “beaglebone:green:usr0”;
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = “heartbeat”;
default-state = “off”;
};
led@3 {
label = “beaglebone:green:usr1”;
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = “mmc0”;
default-state = “off”;
};
led@4 {
label = “beaglebone:green:usr2”;
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = “cpu0”;
default-state = “off”;
};
led@5 {
label = “beaglebone:green:usr3”;
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = “mmc1”;
default-state = “off”;
};
};
vmmcsd_fixed: fixedregulator@0 {
compatible = “regulator-fixed”;
regulator-name = “vmmcsd_fixed”;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&uart0 {
pinctrl-names = “default”;
pinctrl-0 = <&uart0_pins>;
status = “okay”;
};
&usb {
status = “okay”;
};
&usb_ctrl_mod {
status = “okay”;
};
&usb0_phy {
status = “okay”;
};
&usb1_phy {
status = “okay”;
};
&usb0 {
status = “okay”;
dr_mode = “peripheral”;
};
&usb1 {
status = “okay”;
dr_mode = “host”;
};
&cppi41dma {
status = “okay”;
};
&mmc1 {
status = “okay”;
bus-width = <0x4>;
pinctrl-names = “default”;
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vmmcsd_fixed>;
};
&cpu0_opp_table {
/*
- All PG 2.0 silicon may not support 1GHz but some of the early
- BeagleBone Blacks have PG 2.0 silicon which is guaranteed
- to support 1GHz OPP so enable it for PG 2.0 on this board.
/
oppnitro@1000000000 {
opp-supported-hw = <0x06 0x0100>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy_handle = <&dp83867>;
phy-mode = “rgmii-txid”;
};
&mac {
pinctrl-names = “default”, “sleep”;
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
slaves = <1>;
status = “okay”;
};
&davinci_mdio {
pinctrl-names = “default”, “sleep”;
compatible = “ti,dp83867” , “ti,cpsw-mdio” , “ti,davinci_mdio”;
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = “okay”;
dp83867_0: ethernet_phy@0 {
reg =<0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_75_NS>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_75_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
ti,dp83867-rxctrl-strap-quirk;
};
&tscadc {
status = “okay”;
};
&am335x_adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
&aes {
status = “okay”;
};
&sham {
status = “okay”;
};
&wkup_m3_ipc {
ti,scale-data-fw = “am335x-bone-scale-data.bin”;
};
&rtc {
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
clock-names = “ext-clk”, “int-clk”;
system-power-controller;
};
&sgx {
status = “okay”;
};
&am33xx_pinmux {
user_leds_default: user_leds_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) / gpmc_a5.gpio1_21 /
AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) / gpmc_a6.gpio1_22 /
AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) / gpmc_a7.gpio1_23 /
AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) / gpmc_a8.gpio1_24 */
;
};
user_leds_sleep: user_leds_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 /
AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) / gpmc_a6.gpio1_22 /
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) / gpmc_a7.gpio1_23 /
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) / gpmc_a8.gpio1_24 /
;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) / i2c0_sda.i2c0_sda /
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) / i2c0_scl.i2c0_scl /
;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) / uart1_ctsn.i2c2_sda /
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) / uart1_rtsn.i2c2_scl /
;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) / uart0_rxd.uart0_rxd /
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) / uart0_txd.uart0_txd /
;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/ Slave 1 /
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) / mii1_txen.rgmii1_tctl /
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) / mii1_rxdv.rgmii1_rctl /
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) / mii1_txd3.rgmii1_txd3 /
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) / mii1_txd2.rgmii1_txd2 /
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) / mii1_txd1.rgmii1_txd1 /
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) / mii1_txd0.rgmii1_txd0 /
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) / mii1_txclk.rgmii1_txclk /
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) / mii1_rxclk.rgmii1_rxclk /
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) / mii1_rxd3.rgmii1_rxd3 /
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) / mii1_rxd2.rgmii1_rxd2 /
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) / mii1_rxd1.rgmii1_rxd1 /
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) / mii1_rxd0.rgmii1_rxd0 /
;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/ Slave 1 reset value /
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/ MDIO /
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) / mdio_data.mdio_data /
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) / mdio_clk.mdio_clk /
;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/ MDIO reset value /
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) / GPIO0_6 /
;
};
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) / gpmc_csn1.mmc1_clk /
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) / gpmc_csn2.mmc1_cmd /
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad0.mmc1_dat0 /
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad1.mmc1_dat1 /
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad2.mmc1_dat2 /
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad3.mmc1_dat3 /
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad4.mmc1_dat4 /
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad5.mmc1_dat5 /
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad6.mmc1_dat6 /
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) / gpmc_ad7.mmc1_dat7 /
;
};
nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) / xdma_event_intr0 /
;
};
mcasp0_pins: mcasp0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE0) / mcasp0_aclkx /
AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) / mcasp0_fsx /
AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) / mcasp0_axr0 /
AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) / mcasp0_axr2*/
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx /
AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) / gpmc_a11.GPIO1_27 /
;
};
flash_enable: flash_enable {
pinctrl-single,pins = <
AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7) / rmii1_ref_clk.gpio0_29 /
;
};
imu_interrupt: imu_interrupt {
pinctrl-single,pins = <
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) / mii1_rx_er.gpio3_2 /
;
};
ethernet_interrupt: ethernet_interrupt{
pinctrl-single,pins = <
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) / mii1_col.gpio3_0 */
;
};
spi0_pins: spi0_pins{
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk /
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) / spi0_d0 /
AM33XX_IOPAD(0x958, PIN_OUTPUT_PULLUP | MUX_MODE0) / spi0_d1 /
AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0) / spi0_cs0 */
;
};
};
&i2c0 {
baseboard_eeprom: baseboard_eeprom@50 {
compatible = “at,24c256”;
reg = <0x50>;
#address-cells = <1>;
#size-cells = <1>;
baseboard_data: baseboard_data@0 {
reg = <0 0x100>;
};
};
mpu6050: mpu6050@71 {
compatible = “invensense,mpu6050”;
reg = <0x71>;
interrupt-parent = <&gpio3>;
interrupts = <2 0x01>;
/invensense,int_config = <0x10>;
invensense,level_shifter = <0>;
invensense,orientation = [01 00 00 00 01 00 00 00 01];
invensense,sec_slave_type = <0>;
invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];/
};
bmp280: bmp280@78 {
compatible = “bosch,bmp280”;
reg = <0x76>;
};
};
&i2c2 {
pinctrl-names = “default”;
pinctrl-0 = <&i2c2_pins>;
status = “okay”;
clock-frequency = <400000>;
cape_eeprom0: cape_eeprom0@54 {
compatible = “at,24c256”;
reg = <0x54>;
#address-cells = <1>;
#size-cells = <1>;
cape0_data: cape_data@0 {
reg = <0 0x100>;
};
};
cape_eeprom1: cape_eeprom1@55 {
compatible = “at,24c256”;
reg = <0x55>;
#address-cells = <1>;
#size-cells = <1>;
cape1_data: cape_data@0 {
reg = <0 0x100>;
};
};
cape_eeprom2: cape_eeprom2@56 {
compatible = “at,24c256”;
reg = <0x56>;
#address-cells = <1>;
#size-cells = <1>;
cape2_data: cape_data@0 {
reg = <0 0x100>;
};
};
cape_eeprom3: cape_eeprom3@57 {
compatible = “at,24c256”;
reg = <0x57>;
#address-cells = <1>;
#size-cells = <1>;
cape3_data: cape_data@0 {
reg = <0 0x100>;
};
};
tlv320aic3106: tlv320aic3106@1b {
#sound-dai-cells = <0>;
compatible = “ti,tlv320aic3106”;
reg = <0x1b>;
};
};
&mcasp0 {
#sound-dai-cells = <0>;
pinctrl-names = “default”;
pinctrl-0 = <&mcasp0_pins>;
status = “okay”;
op-mode = <0>; /* MCASP_IIS_MODE /
tdm-slots = <2>;
num-serializer = <4>;
serial-dir = < / 0: INACTIVE, 1: TX, 2: RX */
2 0 1 0
;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
&spi0 {
#address-cells = <1>;
#size-cells = <0>;
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&spi0_pins>;
spidev@0 {
spi-max-frequency = <400000>;
reg = <0>;
compatible = “spidev”;
};
};
/ {
model = “Octavo Systems OSD335x-SM Reference Design”;
compatible = “oct,osd335x-reference-design”, “ti,am335x-bone”, “ti,am33xx”;
clk_mcasp0_fixed: clk_mcasp0_fixed {
#clock-cells = <0>;
compatible = “fixed-clock”;
clock-frequency = <24576000>;
};
clk_mcasp0: clk_mcasp0 {
#clock-cells = <0>;
compatible = “gpio-gate-clock”;
clocks = <&clk_mcasp0_fixed>;
enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 /
};
sound {
compatible = “simple-audio-card”;
simple-audio-card,name = “NGI AUDIO TLV320”;
simple-audio-card,widgets =
“Headphone”, “Headphone Jack”,
“Line”, “Line In”;
simple-audio-card,routing =
“Headphone Jack”, “HPLOUT”,
“Headphone Jack”, “HPROUT”,
“LINE1L”, “Line In”,
“LINE1R”, “Line In”;
simple-audio-card,format = “i2s”;
simple-audio-card,bitclock-master = <&sound_master>;
simple-audio-card,frame-master = <&sound_master>;
simple-audio-card,cpu {
sound-dai = <&mcasp0>;
};
sound_master: simple-audio-card,codec {
#sound-dai-cells = <0>;
sound-dai = <&tlv320aic3106>;
clocks = <&clk_mcasp0>;
clock-names = “mclk”;
};
};
};
/ the cape manager /
/ {
bone_capemgr {
compatible = “ti,bone-capemgr”;
status = “okay”;
nvmem-cells = <&baseboard_data &cape0_data &cape1_data &cape2_data &cape3_data>;
nvmem-cell-names = “baseboard”, “slot0”, “slot1”, “slot2”, “slot3”;
#slots = <4>;
/ map board revisions to compatible definitions */
baseboardmaps {
baseboard_beaglebone: board@0 {
board-name = “A335BONE”;
compatible-name = “ti,beaglebone”;
};
baseboard_beaglebone_black: board@1 {
board-name = “A335BNLT”;
compatible-name = “ti,beaglebone-black”;
};
};
};
};
`
I based my Overlay from Octavo’s Device Tree building files. So I’m using their “osd335x-sm.dtsi”
Everything I have configured works (I2C, SPI, Audio Codec, etc) except Ethernet. When my kernel loads, it defaults to General PHY for eth0 and defaults to 1Gbps at full but I do not get a 1Gbps light and connot ping or SSH into my proto board. I can ping localhost but not another laptop when I change the /opt/network/interfaces for eth0 to be static with an ip address and subnet. If I change the “reg= <0>” to anything else, it doesn’t load the PHY at all (-err 19). The chip is strapped for mode 1 and reg 0.
I used the dra71-evm.dts to help me understand how to set up for a DP83867.
I even tried manually loading the driver (sudo modprobe dp83867) and it will show up in lsmod list of modules. But even after setting my ip link down and up, it still only loads the General_PHY driver. I also tried every clock skew setting in the device tree node, from 250 ps to 4 ns… nothing changes it.
To me, it looks like MDIO is not associating the Driver to my settings. The board designer is measureing the MDIO trace lengths.
Does my approach seem logical?
Does my device tree settings look correct to load the DP83867 module?
Could the MDIO lines be too long or out of tolerance on the board and be creating a skew I can’t account for in configuration?
Has anyone else seen this issue?
Any help would be appreciated. I can’t post schematics, but I can post info from syslog or dmesg output if needed.