Hi all,
I have just got my shiney new Beaglebone rev A5 board and am trying to get the TI starterware going on it. We have the IAR tools and a Seggar J-Link for ARM debugging. No 20-pin connector on the board though, I know I could solder wires/a connector onto the PCB to use the J-Link but I was wondering if there is a way of getting the IAR compiler to speak to the FTDI USB to JTAG?
Cheers
Chris
Chris <chris-ponder@tritech.co.uk> writes:
Hi all,
I have just got my shiney new Beaglebone rev A5 board and am trying to get
the TI starterware going on it. We have the IAR tools and a Seggar J-Link
for ARM debugging. No 20-pin connector on the board though, I know I could
solder wires/a connector onto the PCB to use the J-Link but I was wondering
if there is a way of getting the IAR compiler to speak to the FTDI USB to
JTAG?
I would recommend staying far, far away from the IAR compiler. It is
one of the buggier ones I've encountered. I also don't see what the
compiler has to do with JTAG.
Hi Måns,
I agree about the compiler but it is also one of the most flexible
working with more chips and dev boards than any other. The reason it has
anything to do with JTAG is that the debugger has to be able to speak with the
JTAG and this requires a driver of some description. Support for the Seggar J-Link
is included out-of-the-box but there is no option for the beagle bone way of
doing things.
Cheers
Chris
Does anyone have any ideas of how to do this, or do I have to bite the bullet and solder some wires onto the connector?
Chris
Well, I think I have found out how to do this. The IAR compiler supports the TI XDS100 driver and using the v2 USB emulator in the TI XDS 100 options allows IAR to connect to the device.
I am still having some problems though. If I create a new basic C project in IAR with an empty main.c then I can debug just fine. But if I use the StarterWare 2.00.00.06 ewarm\am335x\beaglebone\enet_lwip project I get:
Thu Apr 12, 2012 13:33:42: JTAG XDS100 TMS470, device revision: 0x413FC082, big endian: false, cache: false, board revision: 0x00000000, driver revision: 0x05010200
Thu Apr 12, 2012 13:33:42: Initial reset was performed
Thu Apr 12, 2012 13:34:10: 132340 bytes downloaded (4.70 Kbytes/sec)
Thu Apr 12, 2012 13:34:10: Error writing memory:
…
Thu Apr 12, 2012 13:34:10: Error writing memory:
Thu Apr 12, 2012 13:34:10: Loaded debugee: C:\Data\Products\0709 Common Platform S7\Firmware\Beagle 01\Debug\Exe\c.out
Thu Apr 12, 2012 13:34:10: Error reading register:
Thu Apr 12, 2012 13:34:18: Fatal error: (Error -2131 @ 0x400231) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board,
and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.0.641.0) Session aborted!
Thu Apr 12, 2012 13:34:18: Target reset
Thu Apr 12, 2012 13:34:18: Failed to load debugee: C:\Data\Products\0709 Common Platform S7\Firmware\Beagle 01\Debug\Exe\c.out
The difference would appear to be down to the XCF file provided by the starterware. This is needed as the project is quite big, 400k (ish), and so needs to use the external DRAM. Does anyone have any thoughts on this? StarterWare XCF:
define memory mem with size = 4G;
/* Define internal RAM region */
define region IRAM_region = mem:[from 0x402F0400 size 0x10000];
/* Define internal DRAM region */
define region DRAM_region = mem:[from 0x80000000 size 0x2000000];
/* Define Stack */
define region stack_region = mem:[from 0x87FFFFF8 size 0x08];
define block stack_end with alignment = 8, size =0 { };
place at address mem:0x80000000 { section SYSTEMSTART };
place in DRAM_region { readonly };
place in DRAM_region { readwrite };
place in DRAM_region { zi };
place in stack_region { block stack_end};
Thanks
Chris
Ok I have narrowed this down further, I can use internal SRAM but the external SDRAM does not appear to be available. Since the board has been happily running as a USB data device I assume that the SDRAM is present and working.
. Would this be a vaild assumption?
. Does anyone have any ideas how to place executable code into exteranl SDRAM
Chris <chris-ponder@tritech.co.uk> writes:
Ok I have narrowed this down further, I can use internal SRAM but the
external SDRAM does not appear to be available. Since the board has been
happily running as a USB data device I assume that the SDRAM is present and
working.. Would this be a vaild assumption?
. Does anyone have any ideas how to place executable code into exteranl
SDRAM
You have to program the memory controller (EMIF) with proper timings etc
before you can use the attached RAM.
Ahhh, of course, thanks Måns. I guess that is normally done by uboot. Is there normally a way of getting the compiler to do this, for other compilers?
Chris <chris-ponder@tritech.co.uk> writes:
Ahhh, of course, thanks Måns. I guess that is normally done by uboot.
Yes, x-loader/u-boot configures the RAM.
Is there normally a way of getting the compiler to do this, for other
compilers?
This is not usually something the compiler can or should be doing.
Thanks Måns. Now I understand the problem better I have been able to find some more useful information in the StarterWare manual:
"StarterWare supports only MMCSD and UART boot modes for Beagle Bone. StarterWare is supplied with a bootloader, which initializes the DDR and required peripherals. Once the bootloader and StarterWare application images are ready, they can be flashed/copied onto the media for standalone media
booting."
It must be possible to get an lwIP app running in internal SRAM though, so I guess that is my next challenge.