Are any differential pair signals from the FPGA routed to the P8,P9 Cape headers on the BeagleV Fire board? Are they length matched?
For example,
B0_HSIO12P, B0_HSIO12N
B0_HSIO6P, B0_HSIO6N
B0_HSIO8P, B0_HSIO8N
etc
Hello and welcome!
If you take a look at:
BeagleV-Fire / beaglev-fire · GitLab
You should be able to answer that after a little digging…
I opened the gerber files and poked around, and the HSIO signal pairs do no appear to length matched. I can’t open the brd files to see the net lenghts since I don’t have an allego license. Attached is a picture pointing out HSIO12 p/n for you to look at. While not length matched, they do appear to be routed as a bus, so their total lengths might be close enough to being matched, depending on what you are using them for.
However I would not use HSIO pins for any application that would require length matching for two reasons.
- They go through union semiconductor translators, which are kind of squirrely in my experience. For example, I tried to use these HSIO signals to generate a fan PWM signal, and even at that speed the translators struggled to pull the signal to ground.
- These HSIO signals also have LED’s attached to them on the 3.3V side (its that row of blue leds on the top left of the beagle), so there’s a significant stub on them. You can see these stubs in the attached picture.
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