I might be interested in testing your FPGA cape for the Bone. I am part of a very capable team at the University of Edinburgh, working on prototyping hardware for bleeding edge wireless communication systems.
I am currently gathering opinions within our research group whether we’d like to take the route of using a solution similar to yours or not, and will let you know on the results shortly.
What would you need in terms of “proof” of our technical capability – would publications of our work in peer reviewed journals and conferences suffice?
Sorry I have not been keeping up on this forum topic. If you would like more expedient responses you can send me a direct email. firstname.lastname@example.org
The one thing with the beaglebone is the EEPROM to identify the cape. I don’t see you having a connection to the beaglebone’s I2C bus for that
I have added use of the I2C bus to talk directly to the LPC chip. The LPC will emulate the eeprom function to identify the cape. I have also made some changes to allow for direct programming of the fpga from the Bone.
That’s also why I promote the high-speed ADCs with LVDS outputs.
I have added easy expansion of 4 LVDS pairs through the use of SATA ports. This will allow for any type LVDS applications to be easily interfaced.
As an update I have built a number of the Pi/Bone prototypes and myself and the beta testers are working on the support code to get them up and running with some cool applications such as running a machine vision application using a CMOS camera.
We have also talked about coming up with some projects such as:
- Software defined Radio
- Machine vision
- Bit Coin mining
We hope to have a couple of cool applications running in order to persuade some of the major distributors to carry to board. If this does not work out we will run a Kickstarter to get the board out there.
You see pictures and status updates for the board here: http://valentfx.com/prj/fpga-dev/2-mark-1
Hold tight, we hope to get this board in your hands soon.
Could you email me directly? I would like to talk to you about the work that you and your group are doing.
Hey Guys so a little update you may be interested in. I have designed a fabricated the LOGI-bone. An FPGA cape specifically designed for the beaglebone. I have entered it into the cape contest. The hopes is to get the distributors to carry it!
Here are the specifics: http://valentfx.com/prj/fpga-dev/19-logi-bone-cape
I am trying to get the word on these FPGA boards that I have now named the LOGI family with existing boards being the LOGI-MARK1 and LOGI-BONE. Future boards will be the LOGI-PI and LOGI-ARDUINO.
We currently have a LOGI Team which a few of us who are going to be supporting the boards, creating examples, etc. If any of you are interested in getting involved please let me know!
If you want to see these boards get out there, please help by spreading the word. We hope to have some fun designs up and running soon!
great idea! how much will it cost?
Thanks so much for attaching this to the GPMC port pins. that’s kinda needed for full use of the fpga. Hopefully many of the FPGA pins that attach to P6, P8 & P9 can be tri-state thus allowing “unused” pins not used by the cape HDL to be used elsewhere by other capes and circuitry.
Ahh, Yes, the pins can be tristated. You can load a bitfile that leaves unused pins as “floating”, or you can manually control individual pins for tri-state operation.
By the way, if you guys have a chance check out the logi-bone cape contest entry here and give it a like! I hope that it is selected in the top 3 and will make getting it to you guys a snap as circuitCo will mfg and distribute the design!
Just an update that we are Finally releasing the LOGi-Bone. We just launched our kickstarter! So if you are geared up and ready to add an FPGA to you Bone have a look. As always we are open to thoughts and suggestions!