Can Beaglebone Black generate the Mclk signal needed for i2s audio interface to a DAC?

Hi, I’m playing around with the BBB audio. I have the basic system working well and I understand alsa and its config files better. I notice that the audio on the HDMI is connected to P9-28,29,31 and the signals look good for the serial bit clock, data and L/R clock, (not in that order). I can turn off the HDMI audio.

The external DAC I want to use needs an MCLK signal at either 64X or 256X sample rate. The serial bit clock runs at half that (1.536Mhz with sample rate at 48Khz). So I either need to double that or find a way to have the BBB generate it, hopefully without any CPU, possibly using a programmable PLL or something? I looked around quite a bit, haven’t seen anything. Any pointers?

Thanks,

Jerry