what can i include in the kernel to organize writing mtd partitions?
kernel 2.6.32
CONFIG_MTD=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_OMAP2=y
CONFIG_MTD_NAND_IDS=y
I have these settings, except one (CONFIG_MTD_NAND_ECC=y). I add it to defchonfig but the situation has not changed :(.
dmesg
/ # dmesg
Linux version 2.6.32 (kon@kononov) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #1 Thu Jul 3 15:13:51 MSK 2014
CPU: ARMv7 Processor [411fc087] revision 7 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: AM3517/05 CRANEBOARD
Memory policy: ECC disabled, Data cache writeback
On node 0 totalpages: 65536
free_area_init_node: node 0, pgdat c03c3b94, node_mem_map c03e1000
Normal zone: 512 pages used for memmap
Normal zone: 0 pages reserved
Normal zone: 65024 pages, LIFO batch:15
AM3517 ES3.1 (l2cache iva sgx neon isp )
SRAM: Mapped pa 0x40200000 to va 0xfe400000 size: 0x100000
Reserving 4194304 bytes SDRAM for VRAM
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
Kernel command line: console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait eth=80:02:8e:c4:0d: ip=dhcp
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 256MB = 256MB total
Memory: 251648KB available (3396K code, 304K data, 140K init, 0K highmem)
Hierarchical RCU implementation.
NR_IRQS:368
Clocking rate (Crystal/Core/MPU): 26.0/332/500 MHz
GPMC revision 5.0
IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts
Total of 96 interrupts on 1 active controller
OMAP GPIO hardware version 2.5
OMAP clockevent source: GPTIMER1 at 32768 Hz
Console: colour dummy device 80x30
Calibrating delay loop… 493.67 BogoMIPS (lpj=1929216)
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
regulator: core version 0.5
NET: Registered protocol family 16
mux: Could not set signal i2c2_scl
mux: Could not set signal i2c2_sda
mux: Could not set signal i2c3_scl
mux: Could not set signal i2c3_sda
Configuring SPI balls
Registering SPI driver
mux: Setting signal gpmc_a2.gpio35 0x0014 → 0x0004
mux: Setting signal gpmc_a5.gpio38 0x001c → 0x0004
mux: Setting signal gpmc_ncs1.gpio52 0x001c → 0x0004
mux: Setting signal sdmmc1_clk.sdmmc1_clk 0x0118 → 0x0118
mux: Setting signal sdmmc1_cmd.sdmmc1_cmd 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat0.sdmmc1_dat0 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat1.sdmmc1_dat1 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat2.sdmmc1_dat2 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat3.sdmmc1_dat3 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat4.sdmmc1_dat4 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat5.sdmmc1_dat5 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat6.sdmmc1_dat6 0x0110 → 0x0118
mux: Setting signal sdmmc1_dat7.sdmmc1_dat7 0x0110 → 0x0118
OMAP DMA hardware revision 4.0
bio: create slab at 0
SCSI subsystem initialized
omap2_mcspi omap2_mcspi.1: registered master spi1
spi spi1.0: setup: speed 48000000, sample trailing edge, clk normal
spi spi1.0: setup mode 1, 8 bits/w, 48000000 Hz max → 0
omap2_mcspi omap2_mcspi.1: registered child spi1.0
omap2_mcspi omap2_mcspi.2: registered master spi2
omap2_mcspi omap2_mcspi.3: registered master spi3
omap2_mcspi omap2_mcspi.4: registered master spi4
spi spi4.0: setup: speed 48000000, sample trailing edge, clk normal
spi spi4.0: setup mode 1, 8 bits/w, 48000000 Hz max → 0
omap2_mcspi omap2_mcspi.4: registered child spi4.0
i2c_omap i2c_omap.1: bus 1 rev3.12 at 400 kHz
i2c_omap i2c_omap.2: bus 2 rev3.12 at 400 kHz
i2c_omap i2c_omap.3: bus 3 rev3.12 at 400 kHz
Switching to clocksource 32k_counter
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
NetWinder Floating Point Emulator V0.97 (double precision)
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
JFFS2 version 2.2. (NAND) �© 2001-2006 Red Hat, Inc.
msgmni has been set to 491
alg: No test for stdrng (krng)
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
OMAP DSS rev 2.0
OMAP DISPC rev 3.0
OMAP VENC rev 2
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250.0: ttyS0 at MMIO 0x4806a000 (irq = 72) is a ST16654
serial8250.1: ttyS1 at MMIO 0x4806c000 (irq = 73) is a ST16654
serial8250.2: ttyS2 at MMIO 0x49020000 (irq = 74) is a ST16654
console [ttyS2] enabled
brd: module loaded
loop: module loaded
omap2-nand driver initializing
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xca (Micron NAND 256MiB 3,3V 16-bit)
Creating 5 MTD partitions on “omap2-nand.0”:
0x000000000000-0x000000080000 : “xloader-nand”
uncorrectable error :
0x000000080000-0x000000240000 : “uboot-nand”
uncorrectable error :
0x000000240000-0x000000280000 : “params-nand”
uncorrectable error :
0x000000280000-0x000000780000 : “linux-nand”
uncorrectable error :
0x000000780000-0x000010000000 : “jffs2-nand”
ftl_cs: FTL header not found.
vcan: Virtual CAN interface driver
CAN device driver interface
TI High End CAN Controller Driver 0.7
ti_hecc ti_hecc.1: device registered (reg_base=d0860000, irq=24)
tps65910_rtc tps65910_rtc: rtc core: registered tps65910_rtc as rtc0
TPS65910 RTC device successfully registered
Linux video capture interface: v2.00
OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
TCP cubic registered
NET: Registered protocol family 17
NET: Registered protocol family 15
can: controller area network core (rev 20090105 abi 8)
NET: Registered protocol family 29
can: raw protocol (rev 20090105)
can: broadcast manager protocol (rev 20090105 t)
Power Management for TI OMAP3.
Disabling unused clock “hsotgusb_fck”
Disabling unused clock “hsotgusb_ick”
Disabling unused clock “vpfe_fck”
Disabling unused clock “vpfe_ick”
Disabling unused clock “emac_fck”
Disabling unused clock “emac_ick”
Disabling unused clock “mcbsp_fck”
Disabling unused clock “mcbsp_fck”
Disabling unused clock “mcbsp_fck”
Disabling unused clock “mcbsp_ick”
Disabling unused clock “mcbsp_ick”
Disabling unused clock “mcbsp_ick”
Disabling unused clock “gpt2_ick”
Disabling unused clock “gpt3_ick”
Disabling unused clock “gpt4_ick”
Disabling unused clock “gpt5_ick”
Disabling unused clock “gpt6_ick”
Disabling unused clock “gpt7_ick”
Disabling unused clock “gpt8_ick”
Disabling unused clock “gpt9_ick”
Disabling unused clock “wdt3_ick”
Disabling unused clock “wdt3_fck”
Disabling unused clock “gpio2_dbck”
Disabling unused clock “gpio3_dbck”
Disabling unused clock “gpio4_dbck”
Disabling unused clock “gpio5_dbck”
Disabling unused clock “gpio6_dbck”
Disabling unused clock “gpt9_fck”
Disabling unused clock “gpt8_fck”
Disabling unused clock “gpt7_fck”
Disabling unused clock “gpt6_fck”
Disabling unused clock “gpt5_fck”
Disabling unused clock “gpt4_fck”
Disabling unused clock “gpt3_fck”
Disabling unused clock “gpt2_fck”
Disabling unused clock “gpt12_ick”
Disabling unused clock “wdt1_ick”
Disabling unused clock “gpio1_dbck”
Disabling unused clock “mcbsp_ick”
Disabling unused clock “mcbsp_ick”
Disabling unused clock “gpt10_ick”
Disabling unused clock “gpt11_ick”
Disabling unused clock “hdq_ick”
Disabling unused clock “hdq_fck”
Disabling unused clock “mcbsp_fck”
Disabling unused clock “mcbsp_fck”
Disabling unused clock “gpt11_fck”
Disabling unused clock “gpt10_fck”
Disabling unused clock “dpll4_m6x2_ck”
Disabling unused clock “dpll4_m5x2_ck”
Disabling unused clock “dpll3_m3x2_ck”
Disabling unused clock “sys_clkout1”
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 1
emac-mii: probed
tps65910_rtc tps65910_rtc: setting system clock to 2011-04-05 01:56:25 UTC (1301968585)
mmc0: new high speed SDHC card at address 1234
mmcblk0: mmc0:1234 SA04G 3.63 GiB
mmcblk0: p1 p2
eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=ffffffff:00, id=7c0f1)
IP-Config: Guessing netmask 255.0.0.0
IP-Config: Complete:
device=eth0, addr=62.0.0.0, mask=255.0.0.0, gw=255.255.255.255,
host=62.0.0.0, domain=, nis-domain=(none),
bootserver=255.255.255.255, rootserver=255.255.255.255, rootpath=
kjournald starting. Commit interval 5 seconds
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
Freeing init memory: 140K
PHY: ffffffff:00 - Link is Up - 100/Full
Creating 5 MTD partitions on “omap2-nand.0”:
0x000000000000-0x000000080000 : “xloader-nand”
uncorrectable error :
0x000000080000-0x000000240000 : “uboot-nand”
uncorrectable error :
0x000000240000-0x000000280000 : “params-nand”
uncorrectable error :
0x000000280000-0x000000780000 : “linux-nand”
uncorrectable error :
0x000000780000-0x000010000000 : “jffs2-nand”
I don’t like “uncorrectable error”. What about the pin mux settings? Check u-boot sources if they are correct
What u-boot says about NAND?
nand info
nand erase
in google I found defсonfig which solve this problem, but it is excessive
from_google.defconfig (50.9 KB)
my.defconfig (42.5 KB)
I also do not like it
AM3517_CRANE # nand info
Device 0: NAND 256MiB 3,3V 16-bit, sector size 128 KiB
AM3517_CRANE # nand erase 0x80000 0x200000
NAND erase: device 0 offset 0x80000, size 0x200000
Erasing at 0x260000 – 100% complete.
OK
I compared the two defсonfig, made some changes from the donor and now it worked (without uncorrectable error ) 
thank you for participating
at my controller has multiple partitions but I can erase all but one, what could be the reason?