CAPE EEPROM - MUX Settings, which I/O

GoogleGroups
1

Hello,

Inside the EEPROM of a CAPE, documentation states that bytes 88 through 235 contain the pin usage information for that CAPE.

I am just wondering if someone is able to assist and tell me which of the configurable pins relates to which byte.

for example, byte 88, which pin on the BBB does this relate to?

I am trying to determine what I need to configure each of the bytes to, to suit the CAPE I am prototyping, but am struggling to relate the bytes to the actual pins on the header, I don’t know what is what.

Also the Mux Mode Selection (Bits 2-0), what does this mean exactly?

If someone can help out I would really appreciate it

Thanks in advance

2

last i read here on this list that information in the cape eeprom does
nothing

search the list for that information

3

Software is not that sophisticated and does not use that information.

Gerald

4

Hello,

if someone is able to assist and tell me which of the configurable pins relates to which byte.

Table 17 “EEPROM Pin Usage” in the System Reference Manual (page 99-101) lists the eeprom location and pin on the connector. For example offset 88 corresponds to Connector P9, pin 22. Figure 69 “Component Side Silkscreen” (page 113) can show you where on the board P9 and pin 22 are. Using the schematic, you can see which physical pin on the chip is connected to which pin on the connector.

Also the Mux Mode Selection (Bits 2-0), what does this mean exactly?

Most pins can perform several functions. Depending on what mode you choose, the pin does something different. For example, the SPI0_CS0 and SPI0_D1 pins on the BBB are used in mux mode 2 for the 2nd I2C bus as SDA, SCL. The list of mux modes for each pin is in the AM3359 datasheet. Descriptions and explanations of the other bits is in the AM335X Technical Reference Manual (TRM).

Thomas

5

Software is not that sophisticated and does not use [CAPE EEPROM] information.

As part of my Google Summer of Code project, I’m implementing support for capes in the Minix operating system. I was planning on using the EEPROM contents to configure the pin mux (with checks for conflicts, insane values, etc). I’m curious if anyone knows the reasoning for why the information isn’t used. More directly, are there good reasons not to use the EEPROM pin mux information (i.e. it’s not safe/trusted, etc) or is this just a feature that hasn’t been implemented yet?

Thanks,
Thomas

6

You need to ask the SW folks.

Gerald

7

You need to ask the SW folks.

We are on this list too. The information isn’t sophisticated enough for everything the kernel needs, so we use the other fields and info dropped into the distro. I support updating the format to include a .dtbo.

8

hmm OK thanks.

So the only thing the BBB uses to determine what the CAPE is and what driver to apply is the ‘Part Number’ and the ‘Version’ ?
Does it use the pin count, or the current usage bytes, or the board name and PCB revision?

Thanks