Yeah i stole that from them..
with cape-universal/u0boot overlays/4.9.25-ti-r31.2
all came up root:gpio
debian@beaglebone:/sys/class/gpio$ ls -lha
total 0
drwxrwxr-x 2 root gpio 0 Apr 27 21:38 .
drwxr-xr-x 61 root root 0 Apr 27 21:38 ..
-rw-rw---- 1 root gpio 4.0K Apr 27 21:38 export
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio112 ->
../../devices/platform/ocp/481ae000.gpio/gpiochip3/gpio/gpio112
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio114 ->
../../devices/platform/ocp/481ae000.gpio/gpiochip3/gpio/gpio114
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio115 ->
../../devices/platform/ocp/481ae000.gpio/gpiochip3/gpio/gpio115
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio116 ->
../../devices/platform/ocp/481ae000.gpio/gpiochip3/gpio/gpio116
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio14 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio14
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio15 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio15
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio2 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio2
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio20 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio20
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio22 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio22
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio23 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio23
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio26 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio26
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio27 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio27
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio3 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio3
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio30 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio30
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio31 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio31
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio4 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio4
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio44 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio44
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio45 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio45
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio46 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio46
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio47 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio47
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio48 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio48
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio49 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio49
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio5 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio5
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio50 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio50
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio51 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio51
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio60 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio60
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio61 ->
../../devices/platform/ocp/4804c000.gpio/gpiochip1/gpio/gpio61
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio65 ->
../../devices/platform/ocp/481ac000.gpio/gpiochip2/gpio/gpio65
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio66 ->
../../devices/platform/ocp/481ac000.gpio/gpiochip2/gpio/gpio66
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio67 ->
../../devices/platform/ocp/481ac000.gpio/gpiochip2/gpio/gpio67
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio68 ->
../../devices/platform/ocp/481ac000.gpio/gpiochip2/gpio/gpio68
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio69 ->
../../devices/platform/ocp/481ac000.gpio/gpiochip2/gpio/gpio69
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpio7 ->
../../devices/platform/ocp/44e07000.gpio/gpiochip0/gpio/gpio7
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpiochip0 ->
../../devices/platform/ocp/44e07000.gpio/gpio/gpiochip0
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpiochip32 ->
../../devices/platform/ocp/4804c000.gpio/gpio/gpiochip32
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpiochip64 ->
../../devices/platform/ocp/481ac000.gpio/gpio/gpiochip64
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 gpiochip96 ->
../../devices/platform/ocp/481ae000.gpio/gpio/gpiochip96
-rw-rw---- 1 root gpio 4.0K Apr 27 21:38 unexport
Regards,
and inside one:
debian@beaglebone:/sys/class/gpio/gpio2$ ls -lha
total 0
drwxrwxr-x 3 root gpio 0 Apr 27 21:38 .
drwxrwxr-x 16 root gpio 0 Apr 27 21:38 ..
-rw-rw-r-- 1 root gpio 4.0K Apr 27 21:38 active_low
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 device -> ../../../gpiochip0
-rw-rw-r-- 1 root gpio 4.0K Apr 27 21:38 direction
-rw-rw-r-- 1 root gpio 4.0K Apr 27 21:38 edge
-rw-rw-r-- 1 root gpio 4.0K Apr 27 21:38 label
drwxrwxr-x 2 root gpio 0 Apr 27 21:38 power
lrwxrwxrwx 1 root gpio 0 Apr 27 21:38 subsystem ->
../../../../../../../class/gpio
-rw-rw-r-- 1 root gpio 4.0K Apr 27 21:38 uevent
-rw-rw-r-- 1 root gpio 4.0K Apr 27 21:38 value
Regards,
Still having issues with PWM ?
Yeah i took a break from that, PWM was too painful..
Fixed an LCD and the v4.4.x-bone/v4.4.x-rt-bone u-boot overlay problem
some users where having..
So let's try the pwm with v4.9.x 
Regards,
By the way, I think the small amount I talked about udev, and permissions on my git for bonejs. I pretty much got most of that information from rPI content all over the web. I did have to make several modifications though . …
if only they had a pwm udev rule.
still no go with v4.9.x-ti
debian@beaglebone:/sys/class/pwm$ ls -lha
total 0
drwxrwxr-x 2 root pwm 0 Apr 27 21:39 .
drwxr-xr-x 61 root root 0 Apr 27 21:39 ..
lrwxrwxrwx 1 root pwm 0 Apr 27 21:39 pwmchip0 ->
../../devices/platform/ocp/48300000.epwmss/48300100.ecap/pwm/pwmchip0
lrwxrwxrwx 1 root pwm 0 Apr 27 21:39 pwmchip1 ->
../../devices/platform/ocp/48300000.epwmss/48300200.pwm/pwm/pwmchip1
lrwxrwxrwx 1 root pwm 0 Apr 27 21:39 pwmchip3 ->
../../devices/platform/ocp/48302000.epwmss/48302200.pwm/pwm/pwmchip3
lrwxrwxrwx 1 root pwm 0 Apr 27 21:39 pwmchip5 ->
../../devices/platform/ocp/48304000.epwmss/48304100.ecap/pwm/pwmchip5
lrwxrwxrwx 1 root pwm 0 Apr 27 21:39 pwmchip6 ->
../../devices/platform/ocp/48304000.epwmss/48304200.pwm/pwm/pwmchip6
debian@beaglebone:/sys/class/pwm/pwmchip3$ ls -lha
total 0
drwxrwxr-x 4 root pwm 0 Apr 27 21:48 .
drwxr-xr-x 3 root root 0 Apr 27 21:38 ..
lrwxrwxrwx 1 root pwm 0 Apr 27 21:39 device -> ../../../48302200.pwm
-rw-rw---- 1 root pwm 4.0K Apr 27 21:39 export
-rw-rw-r-- 1 root pwm 4.0K Apr 27 21:39 npwm
drwxrwxr-x 2 root pwm 0 Apr 27 21:39 power
drwxr-xr-x 3 root root 0 Apr 27 21:48 pwm0
lrwxrwxrwx 1 root pwm 0 Apr 27 21:39 subsystem ->
../../../../../../../class/pwm
-rw-rw-r-- 1 root pwm 4.0K Apr 27 21:39 uevent
-rw-rw---- 1 root pwm 4.0K Apr 27 21:39 unexport
debian@beaglebone:/sys/class/pwm/pwmchip3/pwm0$ ls -lha
total 0
drwxr-xr-x 3 root root 0 Apr 27 21:49 .
drwxrwxr-x 4 root pwm 0 Apr 27 21:48 ..
-r--r--r-- 1 root root 4.0K Apr 27 21:50 capture
-rw-r--r-- 1 root root 4.0K Apr 27 21:50 duty_cycle
-rw-r--r-- 1 root root 4.0K Apr 27 21:48 enable
-rw-r--r-- 1 root root 4.0K Apr 27 21:50 period
-rw-r--r-- 1 root root 4.0K Apr 27 21:50 polarity
drwxr-xr-x 2 root root 0 Apr 27 21:50 power
-rw-r--r-- 1 root root 4.0K Apr 27 21:50 uevent
the "pwm0" node always comes up root:root..
Regards,
At this very moment I'm in the process of re-writing an overlay for an
*ahem* undisclosed cape that just so happens to enable 6 channel PWM on the
board. After that, I have to write hardware test software for that same
board( test jig ). So maybe I'll be able to document all the udev rules I
have to make for that board. Maybe, because now I'm thinking I may not be
able to pull that off in a short amount of time. If I do though, I'll relay
that information to you.
yeah take the first two blocks:
https://github.com/rcn-ee/repos/blob/master/bb-customizations/suite/jessie/debian/81-pwm-noroot.rules
it's enough to let you do:
debian@beaglebone:/sys/class/pwm/pwmchip3$ echo 0 > export
debian@beaglebone:/sys/class/pwm/pwmchip3$ echo 0 > unexport
but you have to be root to change pwm0/* after..
Regards,
@Robert,
I’m thinking at this point in time, that we may have to fall off the last creation of files in that path, and do single file permission changes, would would be tedious, and painful. So whatever the last path to be created, you run the udev rule off that, and just traverse down into the exact files you need. Maybe some sort of wild card sorting could be used ? I’m not sure, but I’m thinking we’d need to do something like enable pwmchip0, enable both channels on that, then enable each file seperately for period, and duty cycle. Then whatever other files needs to be changed for access.
it works for gpio... so i wonder if we need to patch the pwm's kernel
permissions....
Regards,
Thanks Robert! That seemed to have worked. I can control it from my user account. I do believe we will be working with PWM devices soon, so I will watch for any updates on that.
/sys/class/gpio/gpio43$ ls -al
total 0
drwxrwxr-x 3 root gpio 0 Apr 27 21:48 .
drwxrwxr-x 3 root gpio 0 Apr 27 21:48 …
-rw-rw-r-- 1 root gpio 4096 Apr 27 21:48 active_low
lrwxrwxrwx 1 root gpio 0 Apr 27 21:48 device → …/…/…/gpiochip1
-rw-rw-r-- 1 root gpio 4096 Apr 27 21:48 direction
-rw-rw-r-- 1 root gpio 4096 Apr 27 21:48 edge
-rw-rw-r-- 1 root gpio 4096 Apr 27 21:48 label
drwxrwxr-x 2 root gpio 0 Apr 27 21:48 power
lrwxrwxrwx 1 root gpio 0 Apr 27 21:48 subsystem → …/…/…/…/…/…/…/class/gpio
-rw-rw-r-- 1 root gpio 4096 Apr 27 21:48 uevent
-rw-rw-r-- 1 root gpio 4096 Apr 27 21:48 value
Opps, didn't mean that to go directly to you only. Hate gmail sometimes .
.. Anyway, schematics to sift through, overlay to write . . . Not often I
get the chance to do work for the boss, and the community at the same time
so . . .
so pwm (pwmchip_sysfs_export), uses: device_create
Whereas gpio (gpiod_export) uses: device_create_with_groups
Regards,
Sorry, did it again, twice.
Yay! That patch did it. now to figure out where it is in the patchqueue..
Sorry Jason/Drew/Mark, looks like i'm breaking pwm in
bonescript/adafruit/etc.. "pwm0" -> "pwm-0:0"
debian@beaglebone:/sys/class/pwm/pwmchip0$ ls -lha
total 0
drwxrwxr-x 3 root pwm 0 Apr 27 22:16 .
drwxr-xr-x 3 root root 0 Apr 27 22:12 ..
lrwxrwxrwx 1 root pwm 0 Apr 27 22:16 device -> ../../../48300100.ecap
-rw-rw---- 1 root pwm 4.0K Apr 27 22:16 export
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 npwm
drwxrwxr-x 2 root pwm 0 Apr 27 22:16 power
lrwxrwxrwx 1 root pwm 0 Apr 27 22:16 subsystem ->
../../../../../../../class/pwm
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 uevent
-rw-rw---- 1 root pwm 4.0K Apr 27 22:16 unexport
debian@beaglebone:/sys/class/pwm/pwmchip0$ echo 0 > export
debian@beaglebone:/sys/class/pwm/pwmchip0$ ls -lha
total 0
drwxrwxr-x 4 root pwm 0 Apr 27 22:16 .
drwxr-xr-x 3 root root 0 Apr 27 22:16 ..
lrwxrwxrwx 1 root pwm 0 Apr 27 22:16 device -> ../../../48300100.ecap
-rw-rw---- 1 root pwm 4.0K Apr 27 22:16 export
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 npwm
drwxrwxr-x 2 root pwm 0 Apr 27 22:16 power
drwxrwxr-x 3 root pwm 0 Apr 27 22:16 pwm-0:0
lrwxrwxrwx 1 root pwm 0 Apr 27 22:16 subsystem ->
../../../../../../../class/pwm
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 uevent
-rw-rw---- 1 root pwm 4.0K Apr 27 22:16 unexport
debian@beaglebone:/sys/class/pwm/pwmchip0$ cd pwm-0\:0/
debian@beaglebone:/sys/class/pwm/pwmchip0/pwm-0:0$ ls -lha
total 0
drwxrwxr-x 3 root pwm 0 Apr 27 22:16 .
drwxrwxr-x 4 root pwm 0 Apr 27 22:16 ..
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 capture
lrwxrwxrwx 1 root pwm 0 Apr 27 22:16 device -> ../../pwmchip0
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 duty_cycle
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 enable
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 period
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 polarity
drwxrwxr-x 2 root pwm 0 Apr 27 22:16 power
lrwxrwxrwx 1 root pwm 0 Apr 27 22:16 subsystem ->
../../../../../../../../class/pwm
-rw-rw-r-- 1 root pwm 4.0K Apr 27 22:16 uevent
Regards,
It’ll break bonejs too, but I can live with that. Just an additional two characters in a string somewhere in my code. A few times . . .hehe
Actually, it won't break my implementation at all. Just need to change how
the implementation is used. pwm(0, 0.0 ) instead of pwm(0, 0). Short term
fix, long term, maybe I should stick with pwm(0, 0) and change the
implementation parsing. *shrug*
It's a little more then that, the first 0 comes from parent:
/sys/class/pwm/pwmchip0/pwm-0:0
/sys/class/pwm/pwmchipA/pwm-A:B
Regards,
Right, with my implementation as it sits. pwm(x, y) where pwmchipx, ->
pwmy. x being the pwmchip numerical number, y being the actual pwm channel(
0 or 1 ) in relation to that pwmchip. So if I passed in something like
pwm(0, 0), I could use the first zero as the pwmchipx number, and then use
both numbers to build the channel y number . . .javascript makes this
really easy, almost too easy.
It's pretty awesome this will be fixed though. So when all said and done,
this could be fixed by installing a new kernel, without contaminating the
rest of the system. right ? I'm kind of cringing at the idea of a kernel
change right now, I have everything exactly how I want it 