config-pin default values

DTJF · October 19, 2018, 10:05am

With kernel 4.14.x on Beaglebone Black board (may Green and White as well) after boot the pin P9_11 is in muxmode

GPIO INPUT PULLUP

, while the config-pin default is

GPIO INPUT PULLDOWN

Why that difference? Shouldn’t the boot mode and the default mode be equal? 13 further pins show that difference.

Charles_Steinkuehler · October 19, 2018, 2:58pm

The default mode for P9_11 is an input with pull-up enabled:

https://github.com/cdsteinkuehler/beaglebone-universal-io/blob/master/cape-universal-00A0.dts#L392-L393

The default pin modes for cape universal were set to match the reset
defaults of the AM3358, so loading the universal device-tree overlay
would not cause any physical change in the pin state. The reset
default states are listed in the AM3358 data-sheet (which is a
different document than the AM335x TRM). Most pins are are generally
GPIO inputs with either a pull-up or pull-down (pin dependent) after
reset.

DTJF · October 19, 2018, 4:11pm

Thanks for the answer, Charles. In the default overlay it’s PULLDOWN:

https://github.com/beagleboard/bb.org-overlays/blob/master/tools/pinmux-generator/BeagleBone_Black.dts#L691-L693

And this is what anybody gets when not installing your cape universal device tree blob. My question is still why?

Charles_Steinkuehler · October 19, 2018, 4:20pm

You'll have to ask RCN, but it looks to me like all the pins were set
to pull-down (except for the I2C pins, anyway). I was careful to
match the power-on reset defaults, since I rely on some of those weak
bias resistors to help insure hardware powers up in a "safe" state.

RobertCNelson · October 19, 2018, 4:24pm

Honestly, i just threw a coin, now that i know what you actually did,
yeap, time to change it back....

Regards,

DTJF · October 19, 2018, 4:31pm

Here’s a list of the related pis:

P9_11
P9_13
P9_12
P8_26
P8_07
P8_08
P8_10
P8_09
P9_22
P9_21
P9_18
P9_17
P9_26
P9_24

And P9_42 (GPIO3_18) is mode 0x24 after boot (not 0x27).
And i2c2 (P9_19, P9_20) are mode 0x33 after boot (not 0x3B).

Regards

RobertCNelson · October 19, 2018, 4:38pm

Thanks!

I'll use that data for comparsion, but sadly that isn't maintainable,
we need to find the flag in "AM335x.json"..

https://github.com/RobertCNelson/bb.org-overlays/tree/master/tools/pinmux-generator

http://processors.wiki.ti.com/index.php/TI_PinMux_Tool

I'm digging into AM335x.json right now for the default states.. Such
that they are properly set for BeagleBone Black, BeagleBone Blue,
Green, Wireless, and PocketBeagle..

Regards,

RobertCNelson · October 19, 2018, 4:44pm

Got it, from http://www.ti.com/lit/ds/symlink/am3358.pdf

from:

U5 : ULCD_VSYNC : L

it looks like "pupdStateAfterHHV":"PD" is the match....

{"type":"PinCommonInfo","devicePinID":"ID_1977","controlRegisterOffset":"0x08e0","pupdStateDuringHHV":"OFF","pupdStateAfterHHV":"PD","type":"PinCommonInfo","pinModeInfo":[{"peripheralPinID":"ID_1978","mode":"0","interfaceName":"LCDC","signalName":"lcd_vsync","ioDir":"O"},{"peripheralPinID":"ID_1765","mode":"1","interfaceName":"GPMC","signalName":"gpmc_a8","ioDir":"O"},{"peripheralPinID":"ID_1707","mode":"2","interfaceName":"GPMC","signalName":"gpmc_a1","ioDir":"O"},{"peripheralPinID":"ID_1979","mode":"3","interfaceName":"ECAT_PRUSS1","signalName":"pr1_edio_data_in2","ioDir":"I"},{"peripheralPinID":"ID_1980","mode":"4","interfaceName":"ECAT_PRUSS1","signalName":"pr1_edio_data_out2","ioDir":"O"},{"peripheralPinID":"ID_1981","mode":"5","interfaceName":"PRU1_PRUSS1","signalName":"pr1_pru1_pru_r30[8]","ioDir":"O"},{"peripheralPinID":"ID_1982","mode":"6","interfaceName":"PRU1_PRUSS1","signalName":"pr1_pru1_pru_r31[8]","ioDir":"I"},
{"peripheralPinID":"ID_1983","mode":"7","interfaceName":"GPIO2","signalName":"gpio2[22]","ioDir":"IO"}]},"ID_1856"

Regards,

RobertCNelson · October 19, 2018, 5:48pm

Here's a list of the related pis:

P9_11
P9_13
P9_12
P8_26
P8_07
P8_08
P8_10
P8_09
P9_22
P9_21
P9_18
P9_17
P9_26
P9_24

Okay ^ these are fixed:

And P9_42 (GPIO3_18) is mode 0x24 after boot (not 0x27).
And i2c2 (P9_19, P9_20) are mode 0x33 after boot (not 0x3B).

Starting on these..

Regards,

DTJF · October 19, 2018, 5:59pm

Thanks for the fast response.

No changes for PocketBeagle.dts or BeagleBone_Blue.dts? (P9_11 = P2_05 = DSM2_3)

Regards

RobertCNelson · October 19, 2018, 6:15pm

Thanks for the fast response.

No changes for PocketBeagle.dts or BeagleBone_Blue.dts? (P9_11 = P2_05 = DSM2_3)

Not yet, still figuring out:

And P9_42 (GPIO3_18) is mode 0x24 after boot (not 0x27).

We want "gpio" by default right? 0x24 is spi_clk..

And i2c2 (P9_19, P9_20) are mode 0x33 after boot (not 0x3B).

I think 0x3B is 0x33 + slew control on, re-reading the am335x manual..

u-boot sets it as:

github.com

u-boot/u-boot/blob/master/board/ti/am335x/mux.c#L107


      
          	{OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)},	/* MMC1_DAT6 */
          	{OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)},	/* MMC1_DAT5 */
          	{OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)},	/* MMC1_DAT4 */
          	{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)},	/* MMC1_DAT3 */
          	{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)},	/* MMC1_DAT2 */
          	{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)},	/* MMC1_DAT1 */
          	{OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)},	/* MMC1_DAT0 */
          	{OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)},	/* MMC1_CLK */
          	{OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)},	/* MMC1_CMD */
          	{OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)},	/* MMC1_WP */
          	{OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},	/* MMC1_CD */
          	{-1},
          };
          
          static struct module_pin_mux i2c0_pin_mux[] = {
          	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
          			PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
          	{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
          			PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
          	{-1},
          };

Regards,

DTJF · October 19, 2018, 6:35pm

Thanks for the fast response.

No changes for PocketBeagle.dts or BeagleBone_Blue.dts? (P9_11 = P2_05 = DSM2_3)

Not yet, still figuring out:

Sorry, I wont be impatient.

And P9_42 (GPIO3_18) is mode 0x24 after boot (not 0x27).

We want “gpio” by default right? 0x24 is spi_clk…

0x24 is ‘mmc0_sdwp’ (mode 4 on ball 0x68, ZCZ ball B12).

RobertCNelson · October 19, 2018, 6:47pm

>
> Thanks for the fast response.
>
> No changes for PocketBeagle.dts or BeagleBone_Blue.dts? (P9_11 = P2_05 = DSM2_3)

Not yet, still figuring out:

Sorry, I wont be impatient.

> And P9_42 (GPIO3_18) is mode 0x24 after boot (not 0x27).

We want "gpio" by default right? 0x24 is spi_clk..

0x24 is 'mmc0_sdwp' (mode 4 on ball 0x68, ZCZ ball B12).

Ah right, i ripped that one out of the kernel..

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm/boot/dts/am335x-bone-common.dtsi?h=v4.19-rc8&id=5d1c115241e4aa0034ddf44693c6bd2e89e10831

u-boot must still be setting it..

having a random shared pin tied to mmc's write protect is only asking
for trouble.. gpio default mode best, i need to rip that pin out of
u-boot..

github.com

u-boot/u-boot/blob/master/board/ti/am335x/mux.c#L61-L81


      
          static struct module_pin_mux mmc0_pin_mux[] = {
          	{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT3 */
          	{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT2 */
          	{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT1 */
          	{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT0 */
          	{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CLK */
          	{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CMD */
          	{OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)},		/* MMC0_WP */
          	{OFFSET(spi0_cs1), (MODE(7) | RXACTIVE | PULLUP_EN)},	/* GPIO0_6 */
          	{-1},
          };
          
          static struct module_pin_mux mmc0_no_cd_pin_mux[] = {
          	{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT3 */
          	{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT2 */
          	{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT1 */
          	{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT0 */
          	{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CLK */
          	{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CMD */
          	{OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)},		/* MMC0_WP */
          	{-1},

> And i2c2 (P9_19, P9_20) are mode 0x33 after boot (not 0x3B).

I think 0x3B is 0x33 + slew control on, re-reading the am335x manual..

This was just pull-up disabled, fixed:

Regards,

DTJF · October 19, 2018, 6:55pm

We want “gpio” by default right? 0x24 is spi_clk…

I think 0x3B is 0x33 + slew control on, re-reading the am335x manual…

0x3B is invalid. It’s 0b11000 for resistors. Only 0b10000=PULLUP, 0b01000=NOPULL and 0b00000=PULLDOWN are defined. (0x33 is valid ->slew controll off, RX on, PULLUP, mode 3)

RobertCNelson · October 19, 2018, 7:09pm

Fixed:
https://github.com/RobertCNelson/Bootloader-Builder/commit/6d59b42c453132178a21504ab07fce26196356cd

Regards,