Cortex-a8 - Disable L2 Cache

Hey guys,

So, I’m working with a bare-metal environment, with u-boot as a bootloader, and would like to disable the L2 cache for some program analysis.

I’m following the instructions provided on arm documentation:

But I don’t seem to be able to write on the control register(C1) to accomplish the first step of disabling L2 cache (disable Bit C);

Do any of you have accomplished it? If so, how?

In ARM’s forum I was told that I need to be on supervisor mode, but on the documentation it says, and I quote, “Supervisor mode is a protected mode for the OS” and since I don’t have an OS (I’m running bare-metal), I don’t know if there is this “mode abstraction”.

Do you have any ideas?