Custom board with AM3354 kernel panic with 47pF on LCD lines

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Our company developed a custom board for a measuring device, with main function as GUI with display and ctouch.
As base schematics were used the available Altium project of the BBB + and some parts of the Chipsee 7" cape. The unused peripherals, such as ETHERNET, HDMI, ID E2PROM, CAN, ecc was removed in our project. MCU is AM3354.
We have some hw issues on this board, mainly seems that the LCD data and control lines has influence on the stability, especially on the DDR3 memory.

  1. if we leave the 47pF capacitors on the LCD lines, the kernel goes always in panic
  2. without those capacitors, the board is more stable
  3. we are checking the RAM stability with “memtester” utility from Charles Cazabon, and we not if there is activity to the TFT, sometimes the test runs with errors (no 47pF capacitors)
  4. our application has a display screen saver function, and when the display goes in power save, no activity on the LCD lines, the memtester runs without error (no 47pF capacitors)
    The power lines to MCU and DDR3 are stable, good decoupling a buffer capacitors are present. PCB is 6 layer, DDR connections are almost idetical as on BBB, layers organization as on BBB.
    Anybody has some tip, what we can check to fix this issue?
    Thanks in advance, Zoli
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DDR3 memory interconnect is a critical design.
As you can see “almost identical” is not good enough.
Either you make it “identical”, and that includes a lot more than just the memory interconnect lines, themselves.
(High speed digital design is also sensitive to grounds, line impedance, ground current flow, and the way you move both the signal and the ground return currents between layers.)
Or go get a three dimensional E&M simulator and a DDR3 expert and do your own design.
With DDR3, if you change ANYTHING, you are on your own.
— Graham