Ddr3 length matching


  I am designing my own board based on the am3358 and one ddr3 chip. I looked at the bbb project to have a example of layout and i have a question about length matching for the ddr3 interface. How the length matching has been done if different layers are used? The signal on the outer layers doesnt travel at the same speed as the inner layers.

You use the PCB SW tools to give you the lengths of each trace. The distance from one layer to the next is not that significant and is well within the needed tolerance.



this can explain to you your issues

Ok thank you very much for the reply it is very useful.